ATAM894R-TNSY Atmel, ATAM894R-TNSY Datasheet - Page 68
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ATAM894R-TNSY
Manufacturer Part Number
ATAM894R-TNSY
Description
flash, Microcontrollers, Microprocessors, Semiconductors and Actives, ic, mcu
Manufacturer
Atmel
Datasheet
1.ATAM894R-TNSY.pdf
(97 pages)
- Current page: 68 of 97
- Download datasheet (2Mb)
6.3.4.11
6.3.4.12
68
ATAM894
Serial Interface Registers
Serial Interface Control Register 1 (SIC1)
Table 6-16.
SIC1
SIR
SCD
SCS1
SCS0
Note:
• In transmit mode (SDD = 1) shifting starts only if the transmit buffer has been loaded
• Setting SIR bit loads the contents of the shift register into the receive buffer
• In MCL modes, writing a 0 to SIR generates a start condition and writing a 1 generates a stop
(SRDY = 1).
(synchronous 8-bit mode only).
condition.
SCS1
1
1
0
0
With SCD = '0' the bits SCS1 and SCS0 are insignificant
Serial Clock source Select bit 1
Serial Clock source Select bit 0
Serial Clock Source Select Bits
Serial Interface Reset
SIR = 1, SSI inactive
SIR = 0, SSI active
Serial Clock Direction
SCD = 1, SC line used as output
SCD = 0, SC line used as input
Note:
Bit 3
SIR
This bit has to be set to '1' during the MCL mode and the Timer 3 mode 10 or 11
SCS0
1
0
1
0
SCD
Bit 2
Internal Clock for SSI
SYSCL/2
T1OUT/2
POUT/2
TOG2/2
SCS1
Bit 1
SCS0
Bit 0
Auxiliary register address: '9'hex
Reset value: 1111b
4679D–4BMCU–05/05
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