ZL50074GAC ZARLINK [Zarlink Semiconductor Inc], ZL50074GAC Datasheet - Page 57

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ZL50074GAC

Manufacturer Part Number
ZL50074GAC
Description
32 K x 32 K Channel TDM Switch with 128 Input and 128 Output Streams
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1. Typical figures are at 25°C, V
2. High Impedance is measured by pulling to the appropriate rail with R
AC Electrical Characteristics - Microprocessor Bus Interface
No
to production testing
10
11
12
13
14
15
16
17
18
19
1
2
3
4
5
6
7
8
9
DS Recovery
CS Recovery
CS asserted setup to DS asserted
Address, SIZ0-1, R/W setup to DS asserted
CS hold from DS deasserted
Address, SIZ0-1, R/W hold from DS
deasserted
Data valid to DTA asserted on read
CS deasserted to Data tri-stated on read
Data setup to DS asserted on write
CS asserted to WAIT deasserted
Data hold from DTA asserted on write
DS asserted to WAIT Asserted
WAIT deasserted to DTA/BERR asserted
skew
DS asserted to DTA Asserted
DS deasserted to DTA Deasserted
CS deasserted to DTA tri-stated
CS deasserted to WAIT tri-stated
BE or UDS/LDS to DS set-up
BE or UDS/LDS skew
Characteristics (Figure , & Figure 16)
DD_CORE
at 1.8 V and V
Zarlink Semiconductor Inc.
DD_IO
ZL50074
at 3.3 V and are for design aid only: not guaranteed and not subject
57
Sym.
t
t
t
t
t
t
t
t
t
CSWA
WAHZ
DSRE
CSRE
t
t
t
t
t
t
t
t
t
BEDS
DTHZ
DHW
WDD
WDS
CSS
ADS
CSH
ADH
DSR
t
AKS
AKD
AKH
DSK
DZ
L
, with timing corrected to cancel time taken to discharge C
Min.
35
50
5
0
0
0
0
0
0
0
0
0
0
Typ.
1
Max.
155
10
75
13
20
5
9
9
7
6
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
C
R
C
R
C
R
C
R
C
R
Connection
Memory
All other
registers
C
R
C
R
C
R
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Data Sheet
= 50 pF,
= 1 k
= 50 pF,
= 1 k
= 30 pF,
= 1K
= 50 pF,
= 1 k
= 50 pF,
= 1 k
= 30 pF,
= 1 K
= 30 pF,
= 1 K
= 30 pF,
= 1K
Notes
2
2
2
2
2
2
2
2
L
.

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