ZL50074GAC ZARLINK [Zarlink Semiconductor Inc], ZL50074GAC Datasheet - Page 41

• Manufacturer Part Number: ZL50074GAC
• Description: 32 K x 32 K Channel TDM Switch with 128 Input and 128 Output Streams
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

17 - 16
15 - 14
CKO2
SRC1
External Read/Write Address: 40284
31
15
Reset Value: 060D1C3C
Bit
0
20
19
18
13
CKO2
SRC0
30
14
0
Name
CKO2
CKO2
POL2
POL2
RATE
SEL2
SEL1
GCO
CKO
GCO
FPO
SRC
1 - 0
1 - 0
SEL1
GCO
29
13
0
POL1
FPO
H
28
12
0
GCI-Bus Selection for FPo2
When this bit is low, FPo2 is set for ST-BUS mode.
When this bit is high, FPo2 is set for GCI-Bus mode.
Frame Pulse Polarity Selection for FPo2
When this bit is low, FPo2 is set for active high.
When this bit is high, FPo2 is set for active low.
Clock Polarity Selection for CKo2
When this bit is low, CKo2 is set for the positive clock edge.
When this bit is high, CKo2 is set for the negative clock edge.
Output Clock Rate for CKo2 and FPo2
The output clock rate can not exceed the selected clock source rate. All rates are avail-
able when the internal system clock is selected as clock source.
Output Clock Source for CKo2 and FPo2
GCI-Bus Selection for FPo1
When this bit is low, FPo1 is set for ST-BUS mode.
When this bit is high, FPo1 is set for GCI-Bus mode.
Table 23 - Output Clock Control Register (continued)
POL1
SEL3
GCO
CKO
27
11
CKO2RATE1 - 0
CKO2SRC1 - 0
H
RATE1
CKO1
POL3
FPO
26
10
00
01
10
00
01
10
11
11
RATE0
CKO1
POL3
CKO
25
9
Zarlink Semiconductor Inc.
ZL50074
RATE1
CKO3
CKO1
SRC1
16.384 MHz
32.768 MHz
65.536 MHz
24
8
8.192 MHz
41
CKo2
Output Timing Source
Internal System Clock
RATE0
CKO3
CKO1
SRC0
CKi0 and FPi0
CKi1 and FPi1
CKi2 and FPi2
23
7
Description
CKO3
SRC1
SEL0
GCO
22
6
CKO3
SRC0
POL0
FPO
21
5
120 ns
FPo2
60 ns
30 ns
15 ns
POL0
SEL2
GCO
CKO
20
4
RATE1
CKO0
POL2
FPO
19
3
RATE0
CKO0
POL2
CKO
18
2
Data Sheet
RATE1
CKO2
CKO0
SRC1
17
1
RATE0
CKO2
CKO0
SRC0
16
0