ZL50074GAC ZARLINK [Zarlink Semiconductor Inc], ZL50074GAC Datasheet - Page 37

• Manufacturer Part Number: ZL50074GAC
• Description: 32 K x 32 K Channel TDM Switch with 128 Input and 128 Output Streams
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

21 - 20
19 - 18
17 - 16
15 - 10
8 - 4
3 - 2
External Read/Write Address: 40200
Reset Value: 000C000C
Bit
9
31
15
0
0
30
14
0
0
OSSRC1 - 0
OSBA1 - 0
ISPD4 - 0
Unused
Unused
Unused
Name
29
13
0
0
ISI
28
12
0
0
H
27
11
Output Stream Bit Advancement
Reserved. In normal functional mode, these bits MUST be set to 11.
Output Stream Clock Source Select
Reserved. In normal functional mode, these bits MUST be set to zero.
Input Stream Inversion
For normal operation, this bit is set low.
To invert the input stream, set this bit high.
Input Sampling Point Delay
Default Sampling Point is 3/4. Adjust according to Figure 2 on page 17.
Reserved. In normal functional mode, these bits MUST be set to 11.
0
0
Table 21 - Group Control Register (continued)
OSSRC1 - 0
OSBA1 - 0
H
26
10
- 4027F
0
0
00
01
10
11
00
01
10
11
25
ISI
0
9
H
ISPD
24
8
Zarlink Semiconductor Inc.
0
4
ZL50074
ISPD
23
7
Internal System Clock
0
3
Output Timing Source
37
Non-65 Mbps
CKi0 and FPi0
CKi1 and FPi1
CKi2 and FPi2
ISPD
15.2 ns
22.8 ns
OSI
22
7.6 ns
6
2
0 ns
Description
OSBA
ISPD
21
5
1
1
OSBA
ISPD
20
4
0
0
19
1
3
1
18
1
2
1
65 Mbps
11.4 ns
3.8 ns
7.6 ns
0 ns
OSSRC
ISSRC
17
1
1
1
Data Sheet
OSSRC
ISSRC
16
0
0
0