BT8954 CONEXANT [Conexant Systems, Inc], BT8954 Datasheet - Page 44
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BT8954
Manufacturer Part Number
BT8954
Description
VOICE PAIR GAIN FRAMER
Manufacturer
CONEXANT [Conexant Systems, Inc]
Datasheet
1.BT8954.pdf
(98 pages)
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3.0 Circuit Descriptions
3.8 Microcomputer Interface
3.8.2 Interrupt Request
Figure 3-22. Interrupt Logic
3-22
Read IMR
Write IMR
Read ISR
Write ISR
Interrupt
Event
Data
The open drain interrupt request output (IRQ*) indicates when a particular set of
transmit, receive, or common status registers has been updated. Eight maskable
interrupt sources are requested on the common IRQ* pin:
to the DSL channel’s 6 ms frame. The LD_TSIG, RD_RSIG, and
SIG_FIFO_ERR occur every 1 ms, 2 ms, 3, ms, or 6 ms. The rate is dependent on
the value of EXTRA_SIG_UPDATE in CMD_1. TX_ERR, RX_ERR, and
PLL_ERR occur whenever these errors are detected.
has two associated registers: Interrupt Mask register [IMR; 0xD1], and Interrupt
Status register [ISR; 0xD0]. A 0 in a given bit of the IMR enables the
corresponding interrupt. A 1 in a given bit of the IMR disables the corresponding
interrupt, thereby preventing it from activating IRQ*. By reading the ISR, the MC
can determine the cause of an interrupt event. Active interrupts are indicated by
ISR bits that are read high while inactive interrupts are indicated by ISR bits that
are read low. Writing a 0 to an Interrupt Status register bit [ISR; 0xD0] clears the
corresponding interrupt, and if no other interrupts are pending, deactivates IRQ*.
Writing a 1 to any ISR bit has no effect. IRQ* is an open-drain output and must be
tied to a pullup resistor. This allows IRQ* to be tied together with a common
interrupt request.
1.
2.
3.
4.
5.
6.
7.
8.
All interrupt events are edge-sensitive. Tx and Rx interrupts are synchronized
The basic structure of each interrupt source is illustrated in
TX = Transmit 6 ms Frame
TX_ERR = Transmit Channel Errors or Transmit HDSL Frame
Repositioned
RX = Receive 6 ms Frame
RX_ERR = Receive Channel Errors or Framer State Transition to
IN_SYNC
PLL_ERR = PLL Error
LD_TSIG = Load Transmit Signaling Interrupt
RD_RSIG = Read Receive Signaling Interrupt
SIG_FIFO_ERR = Signaling FIFO Error Interrupt
Reset
Set
Status
Mask
Conexant
Other Interrupt
Sources
Voice Pair Gain Framer
Figure 3-22
IRQ*
N8954DSC
Bt8954
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