BT8954 CONEXANT [Conexant Systems, Inc], BT8954 Datasheet - Page 21

no-image

BT8954

Manufacturer Part Number
BT8954
Description
VOICE PAIR GAIN FRAMER
Manufacturer
CONEXANT [Conexant Systems, Inc]
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
BT8954EPJ
Manufacturer:
CONEXANT
Quantity:
11 698
Bt8954
Voice Pair Gain Framer
Table 2-1. Hardware Signal Definitions (3 of 4)
N8954DSC
PCMCKO
PCMCKI
ADPCMCK
PCMFn
EPCMFn
PCMR
PCMT
HCLK
DTEST
Pin Label
Number
44-51,
54-58,
65-68
44-49
Pin
62
63
59
64
43
3,
8
9
PCM Clock Output
PCM Clock Input
ADPCM Clock Output
PCM Frame Sync (n =
1,...,18)
Encoded PCM Frame
Sync
(n = 1,...,6)
PCM Receive Data
Output
PCM Transmit Data
Input
HCLK Input
Digital Test
Signal Name
Conexant
I/O
O
O
O
O
O
I
I
I
I
Output PCM clock for sending and receiving bits from PCM
codecs. It is generated by the PLL and is 1.536 MHz or
2.048 MHz depending on the PLL configuration. Connect to
receive/transmit bit clocks and receive/transmit master
clocks of PCM codecs. In normal operation, tie to PCMCKI.
Sends and receives bits from PCM codecs. Controls the PCM
Formatter, reads from the RFIFO, and writes into the TFIFO.
In normal operation, tie to PCMCKO.
Used by ADPCM chips. It is 10x or 4x PCMCKO.
Frame sync pulse for receiving bits from and transmitting
bits to a PCM codec. Connect to receive/transmit frame
syncs of the PCM codec. This signal is low if not connected
to any PCM codec. It supports both short-frame and
long-frame operations.
Channel number of bits received from and transmitted to
PCM codecs. Connect to a decoder to generate
receive/transmit frame syncs for PCM codecs. For n = 1,..,6,
EPCMFn is multiplexed with PCMFn depending on the
ENC_FSYNC configuration in the PCM Format register
[PCM_FORMAT; 0xF1.6].
Serial bit stream to PCM codecs is shifted out at the rising
edge of PCMCKI.
Serial bit stream from the PCM codecs is sampled at the
falling edge of PCMCKI.
Connects to the HCLK output of the Bt8960/70 bit pump. It is
32xBCLK or 64xQCLK and is used as the PLL clock
reference.
DTEST–Active high test input used by Conexant to enable an
internal test mode. This input should be tied to ground
(GND).
Definition
2.0 Pin Descriptions
2-5

Related parts for BT8954