ZL30105QDG ZARLINK [Zarlink Semiconductor Inc], ZL30105QDG Datasheet - Page 31
ZL30105QDG
Manufacturer Part Number
ZL30105QDG
Description
T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110
Manufacturer
ZARLINK [Zarlink Semiconductor Inc]
Datasheet
1.ZL30105QDG.pdf
(50 pages)
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5.0
This section contains ZL30105 application specific details for power supply decoupling, reset operation, clock and
crystal operation.
5.1
It is recommended to place a 100 nF decoupling capacitor close to each pair of power and ground pins as
illustrated in Figure 20 to ensure optimal jitter performance.
5.2
The ZL30105 can use either a clock or crystal as the master timing source. Zarlink application note ZLAN-68 lists a
number of applicable oscillators and crystals that can be used with the ZL30105.
Power Supply Decoupling
Master Clock
Applications
3.3 V
Figure 20 - Recommended Power Supply Decoupling
100 nF
100 nF
100 nF
100 nF
100 nF
100 nF
100 nF
Zarlink Semiconductor Inc.
ZL30105
36 AV DD
29 AV
33 AGND
44 AV
41 AGND
45 AV
51 AGND
37 AV
34 GND
40 GND
25 V
23 GND
61 V
1 GND
31
DD
DD
DD
DD
DD
DD
ZL30105
AV
AV
V
CORE
CORE
V
CORE
GND 13
CORE
GND 1
14
35
12
2
100 nF
100 nF
100 nF
100 nF
Data Sheet
1.8 V