ZL30105QDG ZARLINK [Zarlink Semiconductor Inc], ZL30105QDG Datasheet - Page 15

• Manufacturer Part Number: ZL30105QDG
• Description: T1/E1/SDH Stratum 3 Redundant System Clock Synchonizer for AdvancedTCA and H.110
• Manufacturer: ZARLINK [Zarlink Semiconductor Inc]

Examples:
HMS=1: When ten Normal to Holdover to Normal mode transitions occur and in each case the Holdover mode was
entered for 2 seconds then the accumulated phase change (MTIE) could be as large as 330 ns.
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REF
Output
Clock
REF
Output
Clock
REF
Output
Clock
REF
Output
Clock
Phase
Phase
Phase
holdover_drift
mode_change
10 changes
= 10 x (200 ns + 13 ns) = 330 ns
TIE_CLR=0
Return to Normal mode
= 0.01 ppm x 2 s = 20 ns
Normal mode
Phase drift in Holdover mode
= 0 ns + 13 ns = 13 ns
HMS = 0
Figure 10 - Timing Diagram of Hitless Mode Switching
Zarlink Semiconductor Inc.
ZL30105
15
REF
Output
Clock
REF
Output
Clock
REF
Output
Clock
REF
Output
Clock
TIE_CLR=0
Return to Normal mode
Normal mode
Phase drift in Holdover mode
HMS = 1
Data Sheet