AT32UC3L064-D3HES ATMEL [ATMEL Corporation], AT32UC3L064-D3HES Datasheet - Page 474

• Manufacturer Part Number: AT32UC3L064-D3HES
• Manufacturer: ATMEL [ATMEL Corporation]

22.5
22.6
Table 22-4.
22.7
22.7.1
22.7.2
32099D–06/2010
Pin Name
TWD
TWCK
TWALM
Application Block Diagram
I/O Lines Description
Product Dependencies
I/O Lines
Power Management
I/O Lines Description
Figure 22-2. Application Block Diagram
In order to use this module, other parts of the system must be configured correctly, as
described below.
Both TWD and TWCK are bidirectional lines, connected to a positive supply voltage via a cur-
rent source or pull-up resistor (see
are high. The output stages of devices connected to the bus must have an open-drain or open-
collector to perform the wired-AND function.
TWALM is used to implement the optional SMBus SMBALERT signal.
The TWALM, TWD, and TWCK pins may be multiplexed with I/O Controller lines. To enable
the TWIM, the programmer must perform the following steps:
If the CPU enters a sleep mode that disables clocks used by the TWIM, the TWIM will stop
functioning and resume operation after the system wakes up from sleep mode.
• Program the I/O Controller to:
Rp: Pull up value as given by the I²C Standard
Master
Pin Description
Two-wire Serial Data
Two-wire Serial Clock
SMBus SMBALERT
TWI
– Dedicate TWD, TWCK and optionally TWALM as peripheral lines.
– Define TWD, TWCK and optionally TWALM as open-drain.
TWD
TWCK
serial EEPROM
Atmel TWI
Slave 1
Figure 22-2 on page
I²C RTC
Slave 2
controller
I²C LCD
Slave 3
AT32UC3L016/32/64
474). When the bus is free, both lines
I²C temp.
Slave 4
sensor
Rp
Input/Output
Input/Output
Input/Output
Type
Rp
VDD
474