AT32UC3L064-D3HES ATMEL [ATMEL Corporation], AT32UC3L064-D3HES Datasheet - Page 262

• Manufacturer Part Number: AT32UC3L064-D3HES
• Manufacturer: ATMEL [ATMEL Corporation]

15.6.3
Name:
Access Type:
Offset:
Reset Value:
• CLKRDY: Clock Ready
• CLKBUSY: Clock Busy
• READY: AST Ready
• BUSY: AST Busy
• PERn: Periodic n
• ALARMn: Alarm n
• OVF: Overflow
32099D–06/2010
31
23
15
7
-
-
-
-
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the SR.CLKBUSY bit has a 1-to-0 transition.
0: The clock is ready and can be changed.
1: CLOCK.CEN has been written and the clock is busy.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the SR.BUSY bit has a 1-to-0 transition.
0: The AST accepts writes to CR, CV, SCR, WER, EVE, EVD, ARn, PIRn, and DTR.
1: The AST is busy and will discard writes to CR, CV, SCR, WER, EVE, EVD, ARn, PIRn, and DTR.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the selected bit in the prescaler has a 0-to-1 transition.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when the counter reaches the selected alarm value.
This bit is cleared when the corresponding bit in SCR is written to one.
This bit is set when an overflow has occurred.
Status Register
30
22
14
6
-
-
-
-
SR
Read-only
0x08
0x00000000
CLKRDY
29
21
13
5
-
-
-
CLKBUSY
28
20
12
4
-
-
-
27
19
11
3
-
-
-
-
26
18
10
2
-
-
-
-
AT32UC3L016/32/64
ALARM1
READY
PER1
25
17
9
1
-
ALARM0
BUSY
PER0
OVF
24
16
8
0
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