AT32UC3L064-D3HES ATMEL [ATMEL Corporation], AT32UC3L064-D3HES Datasheet - Page 138

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AT32UC3L064-D3HES

Manufacturer Part Number
AT32UC3L064-D3HES
Description
Manufacturer
ATMEL [ATMEL Corporation]
Datasheet
10.8
32099D–06/2010
Module Configuration
The specific configuration for each PDCA instance is listed in the following tables.The module
bus clocks listed here are connected to the system bus clocks. Please refer to the Power Man-
ager chapter for details.
Table 10-6.
Table 10-7.
Table 10-8.
The table below defines the valid Peripheral Identifiers (PIDs). The direction is specified as
observed from the memory, so RX means transfers from peripheral to memory and TX means
from memory to peripheral.
Table 10-9.
Feature
Number of channels
Number of performance monitors
Module name
PDCA
Register
PSR CH 0
PSR CH 1
PSR CH 2
PSR CH 3
PSR CH 4
PSR CH 5
PSR CH 6
PSR CH 7
PSR CH 8
PSR CH 9
PSR CH 10
PSR CH 11
VERSION
PID
0
1
2
3
4
Direction
RX
RX
RX
RX
RX
PDCA Configuration
Module Clock Name
Register Reset Values
Peripheral Identity Values
PB Clock Name
CLK_PDCA_PB
Reset Value
0
1
2
3
4
5
6
7
8
9
10
11
122
Peripheral Instance
USART0
USART1
USART2
USART3
SPI
PDCA
12
1
HSB Clock Name
CLK_PDCA_HSB
Peripheral Register
RHR
RHR
RHR
RHR
RDR
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