PIC18F24 MICROCHIP [Microchip Technology], PIC18F24 Datasheet - Page 356

• Manufacturer Part Number: PIC18F24
• Description: 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
• Manufacturer: MICROCHIP [Microchip Technology]

TABLE 27-18: I
DS41159D-page 354
PIC18FXX8
100
101
102
103
90
91
106
107
92
109
110
D102
Note 1:
Param
No.
2:
T
T
T
T
T
T
T
T
T
T
T
C
Symbol
SU
SU
SU
AA
R
HIGH
LOW
F
HD
HD
BUF
B
As a transmitter, the device must provide this internal minimum delay time to bridge the undefined region
(min. 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.
A Fast mode I
T
low period of the SCL signal. If such a device does stretch the low period of the SCL signal, it must output
the next data bit to the SDA line.
Before the SCL line is released, T
mode I
SU
:
:
:
:
:
STA
DAT
STO
STA
DAT
;
DAT
2
2
C bus specification).
C™ BUS DATA REQUIREMENTS (SLAVE MODE)
Clock High Time
Clock Low Time
SDA and SCL Rise
Time
SDA and SCL Fall
Time
Start Condition
Setup Time
Start Condition
Hold Time
Data Input Hold
Time
Data Input Setup
Time
Stop Condition
Setup Time
Output Valid from
Clock
Bus Free Time
Bus Capacitive Loading
250 ns must then be met. This will automatically be the case if the device does not stretch the
2
C™ bus device can be used in a Standard mode I
Characteristic
100 kHz mode
400 kHz mode
SSP Module
100 kHz mode
400 kHz mode
SSP module
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
100 kHz mode
400 kHz mode
R
max. + T
SU
:
DAT
20 + 0.1 C
20 + 0.1 C
1.5 T
1.5 T
= 1000 + 250 = 1250 ns (according to the Standard
Min
250
100
4.0
0.6
4.7
1.3
4.7
0.6
4.0
0.6
4.7
0.6
1.3
4.7
—
—
—
—
—
0
0
CY
CY
B
B
1000
3500
Max
300
300
300
0.9
400
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
—
2
C bus system, but the requirement
Units
ns
ns
ns
pF
ns
ns
ns
ns
ns
ns
ns
s
s
s
s
s
s
s
s
s
s
s
s
s
 2004 Microchip Technology Inc.
PIC18FXX8 must operate
at a minimum of 1.5 MHz
PIC18FXX8 must operate
at a minimum of 10 MHz
PIC18FXX8 must operate
at a minimum of 1.5 MHz
PIC18FXX8 must operate
at a minimum of 10 MHz
C
10 to 400 pF
C
10 to 400 pF
Only relevant for Repeated
Start condition
After this period the first
clock pulse is generated
(Note 2)
(Note 1)
Time the bus must be free
before a new transmission
can start
B
B
is specified to be from
is specified to be from
Conditions