PIC18F24 MICROCHIP [Microchip Technology], PIC18F24 Datasheet - Page 307

• Manufacturer Part Number: PIC18F24
• Description: 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
• Manufacturer: MICROCHIP [Microchip Technology]

LFSR
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
 2004 Microchip Technology Inc.
Q Cycle Activity:
After Instruction
Decode
Decode
FSR2H
FSR2L
Q1
Read literal
Read literal
Load FSR
k
[ label ]
0
0
None
The 12-bit literal ‘k’ is loaded into the
file select register pointed to by ‘f’.
2
2
‘k’ MSB
‘k’ LSB
LFSR 2, 0x3AB
1110
1111
Q2
f
k
=
=
FSRf
2
4095
0x03
0xAB
LFSR f,k
1110
0000
Process
Process
Data
Data
Q3
k
00ff
7
kkk
‘k’ to FSRfL
Write literal
literal ‘k’
MSB to
FSRfH
Write
Q4
k
kkkk
11
kkk
MOVF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
REG
W
REG
W
Q1
register ‘f’
Move f
[ label ]
0
d
a
f
N, Z
The contents of register ‘f’ are moved to
a destination dependent upon the
status of ‘d’. If ‘d’ is ‘0’, the result is
placed in W. If ‘d’ is ‘1’, the result is
placed back in register ‘f’ (default).
Location ‘f’ can be anywhere in the
256-byte bank. If ‘a’ is ‘0’, the Access
Bank will be selected, overriding the
BSR value. If ‘a’ = 1, then the bank will
be selected as per the BSR value
(default).
1
1
MOVF
Read
0101
Q2
f
[0,1]
[0,1]
dest
=
=
=
=
255
PIC18FXX8
0x22
0xFF
0x22
0x22
MOVF
REG, W
00da
Process
Data
Q3
DS41159D-page 305
f [,d [,a]]
ffff
Write W
Q4
ffff