PIC18F24 MICROCHIP [Microchip Technology], PIC18F24 Datasheet - Page 248

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PIC18F24

Manufacturer Part Number
PIC18F24
Description
28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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20.2
The A/D conversion time per bit is defined as T
A/D conversion requires 12 T
The source of the A/D conversion clock is software
selectable. The seven possible options for T
• 2 T
• 4 T
• 8 T
• 16 T
• 32 T
• 64 T
• Internal RC oscillator.
For correct A/D conversions, the A/D conversion clock
(T
of 1.6 s.
Table 20-1 shows the resultant T
the device operating frequencies and the A/D clock
source selected.
TABLE 20-1:
TABLE 20-2:
DS41159D-page 246
PIC18FXX8
Legend: Shaded cells are outside of recommended range.
Note 1:
Legend: Shaded cells are outside of recommended range.
Note 1:
AD
) must be selected to ensure a minimum T
Operation
Operation
OSC
OSC
OSC
16 T
32 T
64 T
16 T
32 T
64 T
2 T
4 T
8 T
2 T
4 T
8 T
OSC
OSC
OSC
2:
3:
2:
3:
AD Clock Source (T
AD Clock Source (T
RC
RC
Selecting the A/D Conversion
Clock
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
OSC
The RC source has a typical T
These values violate the minimum required T
For faster conversion times, the selection of another clock source is recommended.
The RC source has a typical T
These values violate the minimum required T
For faster conversion times, the selection of another clock source is recommended.
T
T
AD
AD
ADCS2:ADCS0
ADCS2:ADCS0
vs. DEVICE OPERATING FREQUENCIES
vs. DEVICE OPERATING FREQUENCIES (FOR EXTENDED, LF DEVICES)
000
100
001
101
010
110
011
000
100
001
101
010
110
011
AD
AD
AD
)
)
per 10-bit conversion.
AD
times derived from
AD
AD
AD
100 ns
200 ns
400 ns
800 ns
time of 4 s.
500 ns
time of 6 s.
2-6 s
3-9 s
1.0 s
2.0 s
4.0 s
20 MHz
16.0 s
4 MHz
1.6 s
3.2 s
8.0 s
AD
AD
are:
. The
time
(1)
(2)
(2)
(2)
(1)
(2)
(2)
(2)
(2)
(2)
AD
AD
time.
time.
20.3
The ADCON1, TRISA and TRISE registers control the
operation of the A/D port pins. The port pins that are
desired as analog inputs must have their corresponding
TRIS bits set (input). If the TRIS bit is cleared (output),
the digital output level (V
The A/D operation is independent of the state of the
CHS2:CHS0 bits and the TRIS bits.
400 ns
800 ns
2-6 s
3-9 s
1.0 s
2.0 s
12.8 s
16.0 s
32.0 s
5 MHz
2 MHz
1.6 s
3.2 s
6.4 s
4.0 s
8.0 s
Note 1: When reading the port register, all pins
Device Frequency
Device Frequency
(1)
(2)
(2)
(1)
(2)
(2)
2: Analog levels on any pin that is defined as
Configuring Analog Port Pins
configured as analog input channels will
read as cleared (a low level). Pins config-
ured as digital inputs will convert an
analog input. Analog levels on a digitally
configured input will not affect the
conversion accuracy.
a digital input (including the AN4:AN0
pins) may cause the input buffer to
consume current that is out of the
device’s specification.
1.25 MHz
25.6 s
51.2 s
1.25 MHz
25.6 s
51.2 s
2-6 s
3-9 s
1.6 s
3.2 s
12.8 s
12.8 s
1.6 s
3.2 s
6.4 s
6.4 s
 2004 Microchip Technology Inc.
OH
(1)
(2)
(2)
(1)
or V
(3)
(3)
(3)
(3)
OL
) will be converted.
333.33 kHz
333.33 kHz
192 s
192 s
2-6 s
3-9 s
24 s
48 s
96 s
24 s
48 s
96 s
12 s
12 s
6 s
6 s
(3)
(3)
(3)
(3)
(3)
(3)
(1)
(1)
(3)
(3)

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