PIC18F24 MICROCHIP [Microchip Technology], PIC18F24 Datasheet - Page 346

• Manufacturer Part Number: PIC18F24
• Description: 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
• Manufacturer: MICROCHIP [Microchip Technology]

TABLE 27-7:
FIGURE 27-7:
TABLE 27-8:
DS41159D-page 344
PIC18FXX8
Param No. Symbol
10
11
12
13
14
15
16
17
18
18A
19
20
20A
21
21A
22†
23†
24†
Note 1:
Param No.
Note: Refer to Figure 27-5 for load conditions.
(Output)
—
—
—
—
I/O Pin
I/O Pin
(Input)
OSC1
CLKO
† Data in “Typ” column is at 5V, 25 C unless otherwise stated. These parameters are for design guidance
†
only and are not tested.
These parameters are asynchronous events not related to any internal clock edges.
Measurements are taken in RC mode where CLKO pin output is 4 x T
TosH2ckL OSC1
TosH2ckH OSC1
TckR
TckF
TckL2ioV CLKO
TioV2ckH Port In Valid before CLKO
TckH2ioI
TosH2ioV OSC1
TosH2ioI
TioV2osH Port Input Valid to OSC1
T
T
T
T
T
IO
IO
INP
RBP
RCP
F
F
t
rc
R
F
Sym
OSC
SYS
CLK
PLL CLOCK TIMING SPECIFICATIONS (V
CLKO AND I/O TIMING REQUIREMENTS
Oscillator Frequency Range
On-Chip VCO System Frequency
PLL Start-up Time (Lock Time)
CLKO Stability (Jitter)
Old Value
CLKO Rise Time
CLKO Fall Time
Port In Hold after CLKO
OSC1
Input Invalid (I/O in hold time)
Port Output Rise Time
Port Output Fall Time
INT pin High or Low Time
RB7:RB4 Change INT High or Low Time
RC7:RC4 Change INT High or Low Time
CLKO AND I/O TIMING
Q4
(Q2 cycle) to Port
to CLKO
to CLKO
to Port Out Valid
(Q1 cycle) to Port Out Valid
Characteristic
Characteristic
10
13
17
14
(I/O in setup time)
20, 21
Q1
PIC18FXX8
PIC18LFXX8
PIC18FXX8
PIC18LFXX8
PIC18FXX8
PIC18LFXX8
19
Min
16
—
-2
4
0.25 T
DD
18
Min
= 4.2 TO 5.5V)
100
200
T
T
20
Typ†
—
—
—
—
—
—
—
—
—
—
CY
CY
CY
0
0
—
—
—
—
OSC
+ 25
Q2
.
15
Typ
75
75
35
35
—
—
—
50
—
—
—
10
—
10
—
—
—
—
Max
+2
10
40
2
0.5 T
 2004 Microchip Technology Inc.
Max
200
200
100
100
150
CY
25
60
25
60
—
—
—
—
—
—
—
—
11
Units
MHz
MHz
12
ms
%
+ 20
New Value
16
HS mode only
HS mode only
Units Conditions
Q3
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Conditions
(1)
(1)
(1)
(1)
(1)
(1)
(1)