PIC18F24 MICROCHIP [Microchip Technology], PIC18F24 Datasheet - Page 232

• Manufacturer Part Number: PIC18F24
• Description: 28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
• Manufacturer: MICROCHIP [Microchip Technology]

19.5
19.5.1
The PIC18FXX8 includes two full receive buffers with
multiple acceptance filters for each. There is also a
separate Message Assembly Buffer (MAB) which acts
as a third receive buffer (see Figure 19-4).
19.5.2
Of the three receive buffers, the MAB is always commit-
ted to receiving the next message from the bus. The
remaining two receive buffers are called RXB0 and
RXB1 and can receive a complete message from the
protocol engine. The MCU can access one buffer while
the other buffer is available for message reception or
holding a previously received message.
The MAB assembles all messages received. These
messages will be transferred to the RXBn buffers only
if the acceptance filter criteria are met.
When a message is moved into either of the receive
buffers, the appropriate RXBnIF bit is set. This bit must
be cleared by the MCU when it has completed process-
ing the message in the buffer in order to allow a new
message to be received into the buffer. This bit
provides a positive lockout to ensure that the MCU has
finished with the message before the PIC18FXX8
attempts to load a new message into the receive buffer.
If the RXBnIE bit is set, an interrupt will be generated to
indicate that a valid message has been received.
19.5.3
RXB0 is the higher priority buffer and has two message
acceptance filters associated with it. RXB1 is the lower
priority buffer and has four acceptance filters associ-
ated with it. The lower number of acceptance filters
makes the match on RXB0 more restrictive and implies
a higher priority for that buffer. Additionally, the
RXB0CON register can be configured such if RXB0
contains a valid message and another valid message is
received, an overflow error will not occur and the new
message will be moved into RXB1 regardless of the
acceptance criteria of RXB1. There are also two
programmable acceptance filter masks available, one
for each receive buffer (see Section 19.6 “Message
Acceptance Filters and Masks”).
When a message is received, bits <3:0> of the
RXBnCON register will indicate the acceptance filter
number that enabled reception and whether the
received message is a remote transfer request.
DS41159D-page 230
PIC18FXX8
Note:
Message Reception
RECEIVE MESSAGE BUFFERING
RECEIVE BUFFERS
The entire contents of the MAB are moved
into the receive buffer once a message is
accepted. This means that regardless of
the
extended) and the number of data bytes
received, the entire receive buffer is over-
written with the MAB contents. Therefore,
the contents of all registers in the buffer
must be assumed to have been modified
when any message is received.
RECEIVE PRIORITY
type
of
identifier
(standard
or
The RXM bits set special Receive modes. Normally,
these bits are set to ‘00’ to enable reception of all valid
messages as determined by the appropriate accep-
tance filters. In this case, the determination of whether
or not to receive standard or extended messages is
determined by the EXIDE bit in the Acceptance Filter
register. If the RXM bits are set to ‘01’ or ‘10’, the
receiver will accept only messages with standard or
extended identifiers, respectively. If an acceptance
filter has the EXIDE bit set, such that it does not corre-
spond with the RXM mode, that acceptance filter is
rendered useless. These two modes of RXM bits can
be used in systems where it is known that only standard
or extended messages will be on the bus. If the RXM
bits are set to ‘11’, the buffer will receive all messages
regardless of the values of the acceptance filters. Also,
if a message has an error before the end of frame, that
portion of the message assembled in the MAB before
the error frame will be loaded into the buffer. This mode
has some value in debugging a CAN system and would
not be used in an actual system environment.
19.5.4
The CAN module can be programmed to generate a
time-stamp for every message that is received. When
enabled, the module generates a capture signal for
CCP1 which in turns captures the value of either
Timer1 or Timer3. This value can be used as the
message time-stamp.
To use the time-stamp capability, the CANCAP bit
(CIOCAN<4>) must be set. This replaces the capture
input for CCP1 with the signal generated from the CAN
module. In addition, CCP1CON<3:0> must be set to
‘0011’ to enable the CCP special event trigger for CAN
events.
FIGURE 19-4:
Identifier
Acceptance Mask
Acceptance Filter
Acceptance Filter
TIME-STAMPING
RXM0
RXF0
RXF1
RXB0
Message Assembly Buffer
Data and
Identifier
Accept
RECEIVE BUFFER BLOCK
DIAGRAM
 2004 Microchip Technology Inc.
Accept
Data and
Identifier
Acceptance Mask
Acceptance Filter
Acceptance Filter
Acceptance Filter
Acceptance Filter
RXM1
RXM2
RXF3
RXF4
RXF5
RXB1
Identifier