PIC18F24 MICROCHIP [Microchip Technology], PIC18F24 Datasheet - Page 304

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PIC18F24

Manufacturer Part Number
PIC18F24
Description
28/40-Pin High-Performance, Enhanced Flash Microcontrollers with CAN Module
Manufacturer
MICROCHIP [Microchip Technology]
Datasheet

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GOTO
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
1st word (k<7:0>)
2nd word(k<19:8>)
Description:
Words:
Cycles:
Example:
DS41159D-page 302
PIC18FXX8
Q Cycle Activity:
After Instruction
operation
Decode
No
PC =
Q1
Read literal
Address (THERE)
operation
k
Unconditional Branch
[ label ]
0
None
GOTO allows an unconditional branch
anywhere within entire 2-Mbyte memory
range. The 20-bit value ‘k’ is loaded into
PC<20:1>. GOTO is always a two-cycle
instruction.
2
2
‘k’<7:0>
GOTO THERE
1110
1111
No
Q2
k
PC<20:1>
1048575
GOTO k
k
1111
19
operation
operation
kkk
No
No
Q3
k
kkkk
7
kkk
Write to PC
Read literal
‘k’<19:8>,
operation
No
Q4
kkkk
kkkk
0
8
INCF
Syntax:
Operands:
Operation:
Status Affected:
Encoding:
Description:
Words:
Cycles:
Example:
Q Cycle Activity:
Before Instruction
After Instruction
Decode
CNT
Z
C
DC
CNT
Z
C
DC
Q1
=
=
=
=
=
=
=
=
register ‘f’
Increment f
[ label ]
0
d
a
(f) + 1
The contents of register ‘f’ are
incremented. If ‘d’ is ‘0’, the result is
placed in W. If ‘d’ is ‘1’, the result is
placed back in register ‘f’ (default). If ‘a’
is ‘0’, the Access Bank will be selected,
overriding the BSR value. If ‘a’ = 1, then
the bank will be selected as per the
BSR value (default).
1
1
C, DC, N, OV, Z
INCF
Read
0010
Q2
f
[0,1]
[0,1]
0xFF
0
?
?
0x00
1
1
1
 2004 Microchip Technology Inc.
255
dest
INCF
10da
CNT,
Process
Data
Q3
f [,d [,a]]
ffff
destination
Write to
Q4
ffff

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