KSZ8862-16_10 MICREL [Micrel Semiconductor], KSZ8862-16_10 Datasheet - Page 111

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KSZ8862-16_10

Manufacturer Part Number
KSZ8862-16_10
Description
2-Port Ethernet Switch with Non-PCI Interface and Fiber Support
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
Timing Specifications
Asynchronous Timing without using Address Strobe (ADSN = 0)
Micrel, Inc.
August 2010
Symbol
Note1: When CPU finished current Read or Write operation, it can do next Read or Write operation even the
ARDY is low. During Read or Write operation if the ADRY is low, the CPU has to keep the RDN/WRN low until the
ARDY returns to high.
Note2: In order to speed up the ARDY low time to 40 ns, user has to use the turbo software driver which is only
supported in the A6 device. Please refer to the “KSZ88xx Programmer's Guide” for detail.
t10
Addr, AEN, BExN
t1
t2
t3
t4
t5
t6
t7
t8
t9
(Read Cycle)
( Write Cycle)
RDN, WRN
Write Data
Read Data
Parameter
A1-A15, AEN, BExN[3:0] valid to RDN, WRN active
A1-A15, AEN, BExN[3:0] hold after RDN inactive
(assume ADSN tied Low)
A1-A15, AEN, BExN[3:0] hold after WRN inactive
(assume ADSN tied Low)
Read data valid to ARDY rising
Read data to hold RDN inactive
Write data setup to WRN inactive
Write data hold after WRN inactive
Read active to ARDY Low
Write inactive to ARDY Low
ARDY low (wait time) in read cycle (Note1)
(It is 0ns to read bank select register and 40ns to
read QMU data register in turbo mode) (Note2)
ARDY low (wait time) in read cycle (Note1)
(It is 0ns to read bank select register and 80ns to
read QMU data register in normal mode)
ARDY low (wait time) in write cycle (Note1)
(It is 0ns to write bank select register)
(It is 36ns to write QMU data register)
ADSN
ARDY
ARDY
Table 24. Asynchronous Cycle (ADSN = 0) Timing Parameters
Figure 14. Asynchronous Cycle – ADSN = 0
t1
t7
111
t9
valid
t3
t5
valid
Min
0
0
1
4
4
2
0
0
0
valid
t2
t6
Typ
t4
40
80
50
t8
t10
Max
0.8
8
8
KSZ8862-16/32MQL
Unit
M9999-081310-3.1
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns

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