KSZ8862-16_10 MICREL [Micrel Semiconductor], KSZ8862-16_10 Datasheet - Page 102

• Manufacturer Part Number: KSZ8862-16_10
• Description: 2-Port Ethernet Switch with Non-PCI Interface and Fiber Support
• Manufacturer: MICREL [Micrel Semiconductor]

Bank 52 Host Port VID Control Register (0x04): P3VIDCR
This register contains the global per port control for the switch function. See description in P1VIDCR, Bank 48 (0x04)
Bank 52 Host Port Control Register 3 (0x06): P3CR3
This register contains the global per port control for the switch function. See description in P1CR3, Bank 48 (0x06)
Bank 52 Host Port Ingress Rate Control Register (0x08): P3IRCR
This register contains per port ingress rate control. See description in P1IRCR, Bank 48 (0x08)
Bank 52 Host Port Egress Rate Control Register (0x0A): P3ERCR
This register contains per port egress rate control. See description in P1ERCR, Bank 48 (0x0A)
Banks 53 – 63: Reserved
Except Bank Select Register (0xE)
Micrel, Inc.
August 2010
Bit
3
2-0
Default
0
0x7
R/W
RW
RW
Description
User Priority Ceiling
1 = if the packet’s “user priority field” is greater than the “user priority field” in the port default tag
register, replace the packet’s “user priority field” with the “user priority field” in the port default tag
register.
0 = do no compare and replace the packet’s ‘user priority field.”
Port VLAN Membership
Define the port’s Port VLAN membership. Bit 2 stands for host port, bit 1 for port 2, and bit 0 for port
1. The port can only communicate within the membership. A ‘1’ includes a port in the membership; a
‘0’ excludes a port from the membership.
102
KSZ8862-16/32MQL
M9999-081310-3.1