KSZ8862-16_10 MICREL [Micrel Semiconductor], KSZ8862-16_10 Datasheet - Page 105

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KSZ8862-16_10

Manufacturer Part Number
KSZ8862-16_10
Description
2-Port Ethernet Switch with Non-PCI Interface and Fiber Support
Manufacturer
MICREL [Micrel Semiconductor]
Datasheet
Additional MIB Information
Micrel, Inc.
August 2010
Examples:
1. MIB Counter Read (read port 1 “Rx64Octets” counter at indirect address offset 0x0E)
2. MIB Counter Read (read port 2 “Rx64Octets” counter at indirect address offset 0x2E)
3. MIB Counter Read (read “Port1 TX Drop Packets” counter at indirect address offset 0x100)
Per Port MIB counters are designed as “read clear”. That is, these counters will be cleared after they are read.
All Ports Dropped Packet MIB counters are not cleared after they are accessed. The application needs to keep
track of overflow and valid conditions on these counters.
Then
Then
Then
Write to reg. IACR with 0x1c0e (set indirect address and trigger a read MIB counters operation)
Read reg. IADR5 (MIB counter value 31-16) // If bit 31 = 1, there was a counter overflow
Read reg. IADR4 (MIB counter value 15-0)
Write to reg. IACR with 0x1c2e (set indirect address and trigger a read MIB counters operation)
Read reg. IADR5 (MIB counter value 31-16) // If bit 31 = 1, there was a counter overflow
Read reg. IADR4 (MIB counter value 15-0)
Write to reg. IACR with 0x1d00 (set indirect address and trigger a read MIB counters operation)
Read reg. IADR4 (MIB counter value 15-0)
// If bit 30 = 0, restart (reread) from this register
// If bit 30 = 0, restart (reread) from this register
105
KSZ8862-16/32MQL
M9999-081310-3.1

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