ADE5166_08 AD [Analog Devices], ADE5166_08 Datasheet - Page 84

• Manufacturer Part Number: ADE5166_08
• Description: Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
• Manufacturer: AD [Analog Devices]

ADE5166/ADE5169
DUAL DATA POINTERS
Each ADE5166/ADE5169 incorporates two data pointers. The
second data pointer is a shadow data pointer and is selected via
the data pointer control SFR (DPCON, Address 0xA7). DPCON
features automatic hardware postincrement and postdecrement, as
well as an automatic data pointer toggle.
Note that this is the only section of the data sheet where the
main and shadow data pointers are distinguished. Whenever the
data pointer (DPTR) is mentioned elsewhere in the data sheet,
active DPTR is implied.
In addition, only the MOVC/MOVX @DPTR instructions
automatically postincrement and postdecrement the DPTR.
Other MOVC/MOVX instructions, such as MOVC PC
or MOVC @Ri, do not cause the DPTR to automatically
postincrement and postdecrement.
To illustrate the operation of DPCON, the following code copies
256 bytes of code memory at Address 0xD000 into XRAM,
starting from Address 0x0000:
Table 78. Data Pointer Control SFR (DPCON, Address 0xA7)
Bit
7
6
[5:4]
[3:2]
1
0
Mnemonic
DPT
DP1m1,
DP1m0
DP0m1,
DP0m0
DPSEL
Default
0
0
0
0
0
0
Description
Not implemented. Write don’t care.
Data pointer automatic toggle enable. Cleared by the user to disable autoswapping of the DPTR.
Set in user software to enable automatic toggling of the DPTR after each MOVX or MOVC instruction.
Shadow data pointer mode. These bits enable extra modes of the shadow data pointer operation,
allowing more compact and more efficient code size and execution.
DP1m1
0
0
1
1
Main data pointer mode. These bits enable extra modes of the main data pointer operation, allowing
more compact and more efficient code size and execution.
DP0m1
0
0
1
1
Not implemented. Write don’t care.
Data pointer select. Cleared by the user to select the main data pointer, meaning that the contents of
this 16-bit register are placed into the DPL SFR and DPH SFR. Set by the user to select the shadow data
pointer, meaning that the contents of a separate 16-bit register appear in the DPL SFR and DPH SFR.
DP1m0
0
1
0
1
DP0m0
0
1
0
1
Result (Behavior of the Shadow Data Pointer)
8052 behavior.
DPTR is postincremented after a MOVX or a MOVC instruction.
DPTR is postdecremented after a MOVX or MOVC instruction.
DPTR LSB is toggled after a MOVX or MOVC instruction. This instruction can be
useful for moving 8-bit blocks to/from 16-bit devices.
Result (Behavior of the Main Data Pointer)
8052 behavior.
DPTR is postincremented after a MOVX or a MOVC instruction.
DPTR is postdecremented after a MOVX or MOVC instruction.
DPTR LSB is toggled after a MOVX or MOVC instruction. This instruction is useful
for moving 8-bit blocks to/from 16-bit devices.
Rev. 0 | Page 84 of 148
MOVELOOP: CLR A
MOV DPTR,#0
MOV DPCON,#55H
MOV DPTR,#0D000H
MOVC A,@A+DPTR
MOV A, DPL
JNZ MOVELOOP
;DPTR1 increment mode
;DPTR0 increment mode
;DPTR auto toggling ON
;Post Inc DPTR
;Swap to Main DPTR(Data)
;Increment main DPTR
;Swap Shadow DPTR(Code)
MOVX @DPTR,A
;Main DPTR = 0
;Select shadow DPTR
;DPTR = D000H
;Get data
;Put ACC in XRAM