ADE5166_08 AD [Analog Devices], ADE5166_08 Datasheet - Page 25

• Manufacturer Part Number: ADE5166_08
• Description: Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
• Manufacturer: AD [Analog Devices]

Table 17. Power Management Interrupt Flag SFR (IPSMF, Address 0xF8)
Bit
7
6
5
4
3
2
1
0
Table 18. Battery Switchover Configuration SFR (BATPR, Address 0xF5)
Bit
[7:2]
[1:0]
Table 19. Peripheral Configuration SFR (PERIPH, Address 0xF4)
Bit
7
6
5
4
3
2
[1:0]
Table 20. Power Management Interrupt Enable SFR (IPSME, Address 0xEC)
Bit
7
6
5
4
3
2
1
0
Table 21. Scratch Pad 1 SFR (SCRATCH1, Address 0xFB)
Bit
7 to 0
Mnemonic
RX2FLAG
VSWSOURCE
VDD_OK
PLL_FLT
REF_BAT_EN
Reserved
RXPROG
Bit Address
0xFF
0xFE
0xFD
0xFC
0xFB
0xFA
0xF9
0xF8
Mnemonic
Reserved
BATPRG
Mnemonic
EPSR
Reserved
ESAG
Reserved
EVADC
EBAT
EBSO
EVDCIN
Mnemonic
SCRATCH1
Default
0
0
Default
0
1
1
0
0
0
0
Default
0
0
0
0
0
0
0
0
Default
0
Mnemonic
FPSR
FPSM
FSAG
Reserved
FVADC
FBAT
FBSO
FVDCIN
Default
0
0
0
0
0
0
0
0
Description
These bits must be kept at 0 for proper operation.
Control bits for battery switchover.
BATPRG
00
01
1X
Description
If set, indicates that an RxD2 edge event triggered wake-up from PSM2.
Indicates the power supply that is internally connected to V
If set, indicates that V
If set, indicates that a PLL fault occurred where the PLL lost lock. Set the PLLACK bit (see Table 51) in
the start ADC measurement SFR (ADCGO, Address 0xD8) to acknowledge the fault and clear the
PLL_FLT bit.
Set this bit to enable internal voltage reference in PSM2 mode. This bit should be set if LCD is on in
PSM1 and PSM2 mode.
This bit must be kept at 0 for proper operation.
Controls the function of the P0.7/SS/T1/RxD2 pin.
RXPROG
00
01
11
Description
Enables a PSM interrupt when the power supply restored interrupt flag (FPSR) is set.
Reserved.
Enables a PSM interrupt when the voltage SAG interrupt flag (FSAG) is set.
This bit must be kept at 0 for proper operation.
Enables a PSM interrupt when the V
Enables a PSM interrupt when the V
Enables a PSM interrupt when the battery switchover interrupt flag (FBSO) is set.
Enables a PSM interrupt when the V
Description
Value can be written/read in this register. This value is maintained in all the power saving modes.
Description
Power supply restored interrupt flag. Set when the V
This occurs when the source of V
PSM interrupt flag. Set when an enabled PSM interrupt condition occurs.
Voltage SAG interrupt flag. Set when an ADE energy measurement SAG condition occurs.
This bit must be kept at 0 for proper operation.
V
measurement is ready.
V
ready.
Battery switchover interrupt flag. Set when V
V
BAT
DCIN
DCIN
monitor interrupt flag. Set when V
ADC monitor interrupt flag. Set when V
monitor interrupt flag. Set when V
DD
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power supply is ready for operation.
Result
Battery switchover enabled on low V
Battery switchover enabled on low V
Battery switchover disabled
Result
GPIO
RxD2 with wake-up disabled
RxD2 with wake-up enabled
DCIN
BAT
DCIN
monitor interrupt flag (FBAT) is set.
ADC monitor interrupt flag (FVADC) is set.
monitor interrupt flag (FVDCIN) is set.
SWOUT
BAT
changes from V
falls below BATVTH or when V
DCIN
falls below 1.2 V.
DCIN
SWOUT
changes by VDCIN_DIFF or when V
SWOUT
switches from V
DD
DD
DD
(0 V
BAT
and low V
power supply has been restored.
to V
SWOUT
ADE5166/ADE5169
DD
= V
.
DCIN
BAT
DD
, 1 V
BAT
to V
measurement is
SWOUT
BAT
.
= V
DD
).
DCIN