ADE5166_08 AD [Analog Devices], ADE5166_08 Datasheet - Page 21
![no-image](/images/no-image-200.jpg)
ADE5166_08
Manufacturer Part Number
ADE5166_08
Description
Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
Manufacturer
AD [Analog Devices]
Datasheet
1.ADE5166_08.pdf
(148 pages)
- Current page: 21 of 148
- Download datasheet (3Mb)
TERMINOLOGY
Measurement Error
The error associated with the energy measurement made by the
ADE5166/ADE5169 is defined by the following formula:
Phase Error Between Channels
The digital integrator and the high-pass filter (HPF) in the
current channel have a nonideal phase response. To offset this
phase response and equalize the phase response between
channels, two phase correction networks are placed in the
current channel: one for the digital integrator and the other for
the HPF. The phase correction networks correct the phase
response of the corresponding component and ensure a phase
match between current channel and voltage channel to within
±0.1° over a range of 45 Hz to 65 Hz with the digital integrator
off. With the digital integrator on, the phase is corrected to
within ±0.4° over a range of 45 Hz to 65 Hz.
Power Supply Rejection (PSR)
PSR quantifies the ADE5166/ADE5169 measurement error as a
percentage of reading when the power supplies are varied. For
the ac PSR measurement, a reading at nominal supplies (3.3 V)
is taken. A second reading is obtained with the same input signal
Percentage Errror =
⎛
⎜
⎜
⎝
Energy
Register
True
Energy
−
True
Energy
⎞
⎟
⎟
⎠
×
100
%
Rev. 0 | Page 21 of 148
levels when an ac (100 mV rms/120 Hz) signal is introduced onto
the supplies. Any error introduced by this ac signal is expressed
as a percentage of reading (see the Measurement Error definition).
For the dc PSR measurement, a reading at nominal supplies
(3.3 V) is taken. A second reading is obtained with the same
input signal levels when the supplies are varied ±5%. Any error
introduced is again expressed as a percentage of the reading.
ADC Offset Error
ADC offset error is the dc offset associated with the analog
inputs to the ADCs. It means that, with the analog inputs
connected to AGND, the ADCs still see a dc analog input
signal. The magnitude of the offset depends on the gain and
input range selection. However, when HPF1 is switched on,
the offset is removed from the current channel, and the power
calculation is not affected by this offset. The offsets can be
removed by performing an offset calibration (see the Analog
Inputs section).
Gain Error
Gain error is the difference between the measured ADC output
code (minus the offset) and the ideal output code (see the
Current Channel ADC section and the Voltage Channel ADC
section). It is measured for each of the gain settings on the
current channel (1, 2, 4, 8, and 16). The difference is expressed
as a percentage of the ideal code.
ADE5166/ADE5169
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