ADE5166_08 AD [Analog Devices], ADE5166_08 Datasheet - Page 63

• Manufacturer Part Number: ADE5166_08
• Description: Single-Phase Energy Measurement IC with 8052 MCU, RTC, and LCD Driver
• Manufacturer: AD [Analog Devices]

APPARENT POWER CALCULATION
Apparent power is defined as the maximum power that can be
delivered to a load. V
delivered to the load, respectively. Therefore, the apparent power
(AP) = V
angle between the current and the voltage.
Equation 29 gives an expression of the instantaneous power signal
in an ac system with a phase shift.
Figure 71 illustrates the signal processing for the calculation of the
apparent power in the ADE5166/ADE5169.
The apparent power signal can be read from the waveform register
by setting the WAVMODE register (Address 0x0D) and setting the
WFSM bit (Bit 5) in the Interrupt Enable 3 SFR (MIRQENH,
Address 0xDB). Like the current and voltage channel waveform
sampling modes, the waveform data is available at sample rates
of 25.6 kSPS, 12.8 kSPS, 6.4 kSPS, or 3.2 kSPS.
The gain of the apparent energy can be adjusted by using the
multiplier and by writing a twos complement, 12-bit word to the
VAGAIN register (VAGAIN[11:0], Address 0x1F). Equation 31
shows how the gain adjustment is related to the contents of the
VAGAIN register.
For example, when 0x7FF is written to the VAGAIN register, the
power output is scaled up by 50% (0x7FF = 2047d, 2047/2
Similarly, 0x800 = –2047d (signed twos complement), and power
output is scaled by –50%. Each LSB represents 0.0244% of the
power output. The apparent power is calculated with the current
and voltage rms values obtained in the rms blocks of the
ADE5166/ADE5169.
Output VAGAIN =
v t
t i
⎛
⎜
⎝
p
p
( )
( )
Apparent
( )
(
t
t
)
rms
=
=
=
=
V
× I
v
2
2
(
rms
t
rms
V
I
)
rms
I
rms
×
Power
. This equation is independent from the phase
rms
t i
sin(
sin(
(
rms
cos(
)
ω
ω
and I
×
t
) t
θ
⎧ +
⎨
⎩
+
)
1
−
θ
rms
V
)
VAGAIN
rms
are the effective voltage and current
2
I
V
I
12
rms
rms
rms
cos(
CURRENT RMS SIGNAL – i(t)
⎫
⎬
⎭
VOLTAGE RMS SIGNAL – v(t)
0x1CF68C
0x1CF68C
⎞
⎟
⎠
2
ω
0x00
0x00
t
+
θ
)
Figure 71. Apparent Power Signal Processing
12
= 0.5).
Rev. 0 | Page 63 of 148
(26)
(27)
(29)
(30)
(31)
VARMSCFCON
Apparent Power Offset Calibration
Each rms measurement includes an offset compensation register
to calibrate and eliminate the dc component in the rms value (see
the Current Channel RMS Calculation section and the Voltage
Channel RMS Calculation section). The voltage and current
channels rms values are then multiplied together in the apparent
power signal processing. Because no additional offsets are
created in the multiplication of the rms values, there is no
specific offset compensation in the apparent power signal
processing. The offset compensation of the apparent power
measurement is done by calibrating each individual rms
measurement.
APPARENT ENERGY CALCULATION
The apparent energy is given as the integral of the apparent power.
The ADE5166/ADE5169 achieve the integration of the apparent
power signal by continuously accumulating the apparent power
signal in an internal 48-bit register. The apparent energy register
(VAHR[23:0], Address 0x07) represents the upper 24 bits of this
internal register. This discrete time accumulation or summation
is equivalent to integration in continuous time. Equation 33
expresses the relationship.
where:
n is the discrete time sample number.
T is the sample period.
The discrete time sample period (T) for the accumulation register
in the ADE5166/ADE5169 is 1.22 μs (5/MCLK).
VAGAIN
Apparent Energy =
Apparent
DIGITAL-TO-FREQUENCY
0x1A36E2
CONVERTER
APPARENT POWER
SIGNAL (P)
Energy
TO
=
∫
lim
T
Apparent P
→
0
⎧
⎨
⎩
∑
n
∞
=
0
Apparent
ADE5166/ADE5169
ower(t)dt
Power
(
nT
)
×
T
⎫
⎬
⎭
(32)
(33)