CY7C1471BV25_11 CYPRESS [Cypress Semiconductor], CY7C1471BV25_11 Datasheet - Page 12

• Manufacturer Part Number: CY7C1471BV25_11
• Description: 72-Mbit (2 M x 36/4 M x 18/1 M x 72) Flow-Through SRAM with NoBL Architecture
• Manufacturer: CYPRESS [Cypress Semiconductor]

Truth Table
The truth table for CY7C1471BV25, CY7C1473BV25, and CY7C1475BV25 follows.
Notes
Document Number: 001-15013 Rev. *H
Deselect Cycle
Deselect Cycle
Deselect Cycle
Continue Deselect Cycle
Read Cycle (Begin Burst)
Read Cycle (Continue Burst)
NOP/Dummy Read
(Begin Burst)
Dummy Read
(Continue Burst)
Write Cycle (Begin Burst)
Write Cycle (Continue Burst)
NOP/Write Abort
(Begin Burst)
Write Abort (Continue Burst)
Ignore Clock Edge (Stall)
Sleep Mode
1. X = “Don't Care.” H = Logic HIGH, L = Logic LOW. BW
2. Write is defined by BW
3. When a write cycle is detected, all IOs are tri-stated, even during byte writes.
4. The DQs and DQP
5. CEN = H, inserts wait states.
6. Device powers up deselected with the IOs in a tri-state condition, regardless of OE.
7. OE is asynchronous and is not sampled with the clock rise. It is masked internally during write cycles. During a read cycle DQs and DQP
are asserted, see
or when the device is deselected, and DQs and DQP
Operation
Truth Table for Read/Write on page 13
X
pins are controlled by the current cycle and the OE signal. OE is asynchronous and is not sampled with the clock.
X
, and WE. See
Address
External
External
External
Current
Used
None
None
None
None
None
None
Next
Next
Next
Next
Truth Table for Read/Write on page
CE
H
X
X
X
X
X
L
X
X
X
X
L
L
L
X
X
= data when OE is active.
1
= L signifies at least one Byte Write Select is active, BW
for details.
CE
H
X
X
X
H
X
H
X
X
H
X
X
X
L
2
CE
H
X
X
X
X
L
X
L
X
L
L
X
X
X
3
13.
ZZ
H
L
L
L
L
L
L
L
L
L
L
L
L
L
ADV/LD
H
H
H
H
H
X
X
L
L
L
L
L
L
L
CY7C1473BV25, CY7C1475BV25
WE
H
H
X
X
X
X
X
X
L
X
X
X
X
L
[1, 2, 3, 4, 5, 6, 7]
BW
X
X
X
X
X
X
X
X
H
H
X
X
L
L
X
= Valid signifies that the desired Byte Write Selects
X
OE
H
H
X
X
X
X
L
L
X
X
X
X
X
X
CEN
CY7C1471BV25
H
X
L
L
L
L
L
L
L
L
L
L
L
L
X
= tri-state when OE is inactive
L->H
L->H
L->H
L->H
L->H Data Out (Q)
L->H Data Out (Q)
L->H
L->H
L->H
L->H
L->H
L->H
L->H
CLK
X
Page 12 of 33
Data In (D)
Data In (D)
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
Tri-State
DQ
-
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