h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 94

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 2 CPU
2.6
The H8S/2000 CPU has 65 types of instructions. The instructions are classified by function as
shown in table 2.1.
Table 2.1
Function
Data transfer
Arithmetic operations
Logic operations
Shift
Bit manipulation
Branch
System control
Block data transfer
Legend: B:
Notes: 1. POP.W Rn and PUSH.W Rn are identical to MOV.W @SP+, Rn and MOV.W Rn,
Rev. 3.00 Mar 21, 2006 page 40 of 788
REJ09B0300-0300
2. Bcc is the general name for conditional branch instructions.
3. Cannot be used in this LSI.
4. When using the TAS instruction, use registers ER0, ER1, ER4, and ER5.
5. ER7 is not used as the register that can be saved (STM)/restored (LDM) when using
W: Word size
L:
Instruction Set
@–SP. POP.L ERn and PUSH.L ERn are identical to MOV.L @SP+, ERn and MOV.L
ERn, @–SP.
STM/LDM instruction, because ER7 is the stack pointer.
Instruction Classification
Byte size
Longword size.
Instructions
MOV
POP *
LDM *
MOVFPE *
ADD, SUB, CMP, NEG
ADDX, SUBX, DAA, DAS
INC, DEC
ADDS, SUBS
MULXU, DIVXU, MULXS, DIVXS
EXTU, EXTS
TAS *
AND, OR, XOR, NOT
SHAL, SHAR, SHLL, SHLR, ROTL, ROTR, ROTXL,
ROTXR
BSET, BCLR, BNOT, BTST, BLD, BILD, BST, BIST,
BAND, BIAND, BOR, BIOR, BXOR, BIXOR
Bcc *
TRAPA, RTE, SLEEP, LDC, STC, ANDC, ORC, XORC,
NOP
EEPMOV
2
4
, JMP, BSR, JSR, RTS
1
5
, PUSH *
, STM *
3
, MOVTPE *
5
1
3
Size
B/W/L
W/L
L
B
B/W/L
B
B/W/L
L
B/W
W/L
B
B/W/L
B/W/L
B
—
—
—
Total: 65
Types
5
19
4
8
14
5
9
1