h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 617

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

If the received address matches the host address in an LPC register (IDR, ODR, STR, TWR), the
host interface enters the busy state; it returns to the idle state by output of a state count 12
turnaround. Register and flag changes are made at this timing, so in the event of a transfer cycle
forced termination (abort) before state #12, registers and flags are not changed.
State
Count
1
2
3
4
5
6
7
8
9
10
11
12
13
The timing of the LFRAME, LCLK, and LAD signals is shown in figures 19.2 and 19.3.
Contents
Start
Cycle type/direction Host
Address 1
Address 2
Address 3
Address 4
Turnaround
(recovery)
Turnaround
Synchronization
Data 1
Data 2
Turnaround
(recovery)
Turnaround
I/O Read Cycle
Drive
Source
Host
Host
Host
Host
Host
Host
None
Slave
Slave
Slave
Slave
None
Value
(3 to 0)
0000
0000
Bits 15 to
12
Bits 11 to 8
Bits 7 to 4
Bits 3 to 0
1111
ZZZZ
0000
Bits 3 to 0
Bits 7 to 4
1111
ZZZZ
Section 19 Host Interface LPC Interface (LPC)
Contents
Start
Cycle type/direction Host
Address 1
Address 2
Address 3
Address 4
Data 1
Data 2
Turnaround
(recovery)
Turnaround
Synchronization
Turnaround
(recovery)
Turnaround
Rev. 3.00 Mar 21, 2006 page 563 of 788
I/O Write Cycle
Drive
Source
Host
Host
Host
Host
Host
Host
Host
Host
None
Slave
Slave
None
REJ09B0300-0300
Value
(3 to 0)
0000
0010
Bits 15 to
12
Bits 11 to 8
Bits 7 to 4
Bits 3 to 0
Bits 3 to 0
Bits 7 to 4
1111
ZZZZ
0000
1111
ZZZZ