h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 512

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h8s-2161b

Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 16 I
Rev. 3.00 Mar 21, 2006 page 458 of 788
REJ09B0300-0300
Figure 16.18 Sample Flowchart for Operations in Slave Receive Mode (HNDS = 1)
2
C Bus Interface (IIC) (Optional)
Read AASX, AAS and ADZ in ICSR
Read ICDR, clear IRIC flag
No
No
No
Clear IRIC flag in ICCR
Read IRIC flag in ICCR
Read IRIC flag in ICCR
Clear IRIC flag in ICCR
Read IRIC flag in ICCR
Read IRIC flag in ICCR
Set ACKB = 1 in ICSR
and TRS = 0 in ICCR
Set ACKB = 0 in ICSR
and HNDS = 1 in ICXR
Slave receive mode
Clear IRIC in ICCR
Read TRS in ICCR
Last reception?
and ADZ = 1?
Set MST = 0
Initialize IIC
ICDRF
Read ICDR
Read ICDR
TRS = 1?
IRIC
IRIC
IRIC
AAS = 1
End
= 1?
= 1?
= 1?
Yes
Yes
Yes
= 1?
Yes
No
No
No
No
Yes
Yes
Yes
[2] Read the receive data remaining unread.
[1] Initialization. Select slave receive mode.
[3] to [7] Wait for one byte to be received (slave address + R/W)
[10] Read the receive data. The first read is a dummy read.
[5] to [7] Wait for the reception to end.
[8] Clear IRIC
[10] Read the receive data.
[8] Clear IRIC flag.
[9] Set acknowledge data for the last reception.
[11] Detect stop condition
[12] Clear IRIC flag.
Slave transmit mode
General call address processing
* Description omitted

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