h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 107

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Register Indirect with Pre-Decrement—@–ERn: The value 1, 2, or 4 is subtracted from an
address register (ERn) specified by the register field in the instruction code, and the result
becomes the address of a memory operand. The result is also stored in the address register. The
value subtracted is 1 for byte access, 2 for word access, and 4 for longword access. For word or
longword transfer instructions, the register value should be even.
2.7.5
The instruction code contains the absolute address of a memory operand. The absolute address
may be 8 bits long (@aa:8), 16 bits long (@aa:16), 24 bits long (@aa:24), or 32 bits long
(@aa:32). Table 2.12 indicates the accessible absolute address ranges.
To access data, the absolute address should be 8 bits (@aa:8), 16 bits (@aa:16), or 32 bits
(@aa:32) long. For an 8-bit absolute address, the upper 24 bits are all assumed to be 1 (H'FFFF).
For a 16-bit absolute address, the upper 16 bits are a sign extension. For a 32-bit absolute address,
the entire address space is accessed.
A 24-bit absolute address (@aa:24) indicates the address of a program instruction. The upper 8
bits are all assumed to be 0 (H'00).
Table 2.12 Absolute Address Access Ranges
2.7.6
The 8-bit (#xx:8), 16-bit (#xx:16), or 32-bit (#xx:32) immediate data contained in an instruction
code can be used directly as an operand.
The ADDS, SUBS, INC, and DEC instructions implicitly contain immediate data in their
instruction codes. Some bit manipulation instructions contain 3-bit immediate data in the
instruction code, specifying a bit number. The TRAPA instruction contains 2-bit immediate data
in its instruction code, specifying a vector address.
Absolute Address
Data address
Program instruction
address
Absolute Address—@aa:8, @aa:16, @aa:24, or @aa:32
Immediate—#xx:8, #xx:16, or #xx:32
8 bits (@aa:8)
16 bits (@aa:16)
32 bits (@aa:32)
24 bits (@aa:24)
Normal Mode
H'FF00 to H'FFFF
H'0000 to H'FFFF
Rev. 3.00 Mar 21, 2006 page 53 of 788
Advanced Mode
H'FFFF00 to H'FFFFFF
H'000000 to H'007FFF,
H'FF8000 to H'FFFFFF
H'000000 to H'FFFFFF
REJ09B0300-0300
Section 2 CPU