h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 706

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 25 Power-Down Modes
25.6
The CPU makes a transition to hardware standby mode from any mode when the STBY pin is
driven low.
In hardware standby mode, all functions enter the reset state. As long as the prescribed voltage is
supplied, on-chip RAM data is retained. The I/O ports are set to the high-impedance state.
In order to retain on-chip RAM data, the RAME bit in SYSCR should be cleared to 0 before
driving the STBY pin low. Do not change the state of the mode pins (MD1 and MD0) while this
LSI is in hardware standby mode.
Hardware standby mode is cleared by the STBY pin input or the RES pin input.
When the STBY pin is driven high while the RES pin is low, clock oscillation is started. Ensure
that the RES pin is held low until system clock oscillation stabilizes. When the RES pin is
subsequently driven high after the clock oscillation stabilization time has passed, reset exception
handling starts.
Rev. 3.00 Mar 21, 2006 page 652 of 788
REJ09B0300-0300
Oscillator
NMI
NMIEG
SSBY
Hardware Standby Mode
Figure 25.3 Application Example in Software Standby Mode
NMI exception
handling
NMIEG = 1
SSBY = 1
SLEEP instruction
Software standby mode
(power-down mode)
stabilization
Oscillation
time t
OSC2
NMI exception
handling