h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 628

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h8s-2161b

Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Section 19 Host Interface LPC Interface (LPC)
clock must first be issued to the host. For details see section 19.4.6, Host Interface Clock Start
Request (CLKRUN).
19.4.6
A request to restart the clock (LCLK) can be sent to the host processor by means of the CLKRUN
pin. With LPC data transfer and SERIRQ in continuous mode, a clock restart is never requested
since the transfer cycles are initiated by the host. With SERIRQ in quiet mode, when a host
interrupt request is generated the CLKRUN signal is driven and a clock (LCLK) restart request is
sent to the host. The timing for this operation is shown in figure 19.7.
Cases other than SERIRQ in quiet mode when clock restart is required must be handled with a
different protocol, using the PME signal, etc.
Rev. 3.00 Mar 21, 2006 page 574 of 788
REJ09B0300-0300
CLK
CLKRUN
Host Interface Clock Start Request (CLKRUN)
Pull-up enable
Drive by the slave processor
Figure 19.7 Clock Start Request Timing
1
2
Drive by the host processor
3
4
5
6

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