h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 497

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h8s-2161b

Manufacturer Part Number
h8s-2161b
Description
Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
Manufacturer
Renesas Electronics Corporation.
Datasheet
Table 16.6 I
Legend
S
SLA
R/W
A
DATA
P
SDA
SCL
S
Start condition. The master device drives SDA from high to low while SCL is high
Slave address. The master device selects the slave device.
Indicates the direction of data transfer: from the slave device to the master device
when R/W is 1, or from the master device to the slave device when R/W is 0
Acknowledge. The receiving device drives SDA low to acknowledge a transfer. (The
slave device returns acknowledge in master transmit mode, and the master device
returns acknowledge in master receive mode.)
Transferred data. The bit length of transferred data is set with the BC2 to BC0 bits in
ICMR. The MSB first or LSB first is switched with the MLS bit in ICMR.
Stop condition. The master device drives SDA from low to high while SCL is high
2
C Bus Data Format Symbols
FS=1 and FSX=1
SLA
1–7
S
1
Figure 16.5 I
R/W
8
DATA
8
1
A
9
Figure 16.6 I
2
C Bus Data Format (Serial Format)
DATA
n
1–7
DATA
m
2
C Bus Timing
8
Section 16 I
Rev. 3.00 Mar 21, 2006 page 443 of 788
9
A
P
1
Transfer bit count
(n = 1 to 8)
Transfer frame count
(m = from 1)
2
C Bus Interface (IIC) (Optional)
1–7
DATA
8
REJ09B0300-0300
A/A
9
P

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