h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 580

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Section 18 Host Interface X-Bus Interface (XBS)
Table 18.9 HIRQ Setting/Clearing Conditions
Host Interrupt
Signal
HIRQ11
(P43)
HIRQ1
(P44)
HIRQ12
(P45)
HIRQ3
(PB0)
HIRQ4
(PB1)
Rev. 3.00 Mar 21, 2006 page 526 of 788
REJ09B0300-0300
No
No
Figure 18.3 HIRQ Output Flowchart (Example of Channels 1 and 2)
Write 1 to P4DR
Write to ODR
Setting Condition
Internal CPU reads 0 from bit P43DR, then
writes 1
Internal CPU reads 0 from bit P44DR, then
writes 1
Internal CPU reads 0 from bit P45DR, then
writes 1
Internal CPU reads 0 from bit PB0ODR,
then writes 1
Internal CPU reads 0 from bit PB1ODR,
then writes 1
P4DR = 0?
transferred?
All bytes
Yes
Yes
Slave CPU
HIRQ output high
HIRQ output low
Clearing Condition
Internal CPU writes 0 in bit P43DR, or
host reads output data register_2
(ODR_2)
Internal CPU writes 0 in bit P44DR, or
host reads output data register_1
(ODR_1)
Internal CPU writes 0 in bit P45DR, or
host reads output data register_1
(ODR_1)
Internal CPU writes 0 in bit PB0ODR,
or host reads output data register_3
(ODR_3)
Internal CPU writes 0 in bit PB1ODR,
or host reads output data register_4
(ODR_4)
Hardware operations
Software operations
Interrupt initiation
Master CPU
ODR read