h8s-2161b Renesas Electronics Corporation., h8s-2161b Datasheet - Page 301

• Manufacturer Part Number: h8s-2161b
• Description: Renesas 16-bit Single-chip Microcomputer H8s Family/h8s/2100 Series
• Manufacturer: Renesas Electronics Corporation.

Bit
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DADRB
Bit Name
DA13
DA12
DA11
DA10
DA9
DA8
DA7
DA6
DA5
DA4
DA3
DA2
DA1
DA0
CFS
REGS
Initial Value
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Description
D/A Data 13 to 0
These bits set a digital value to be converted to an
analog value.
In each base cycle, the DACNT value is continually
compared with the DADR value to determine the duty
cycle of the output waveform, and to decide whether to
output a fine-adjustment pulse equal in width to the
resolution. To enable this operation, this register must
be set within a range that depends on the CFS bit. If the
DADR value is outside this range, the PWM output is
held constant.
A channel can be operated with 12-bit precision by
keeping the two lowest data bits (DA1 and DA0) cleared
to 0. The two lowest data bits correspond to the two
highest bits in DACNT.
Carrier Frequency Select
0: Base cycle = resolution (T)
1: Base cycle = resolution (T)
Register Select
DADRA and DACR, and DADRB and DACNT, are
located at the same addresses. The REGS bit specifies
which registers can be accessed.
0: DADRA and DADRB can be accessed
1: DACR and DACNT can be accessed
DADR range = H'0401 to H'FFFD
DADR range = H'0103 to H'FFFF
Rev. 3.00 Mar 21, 2006 page 247 of 788
Section 10 14-Bit PWM Timer (PWMX)
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REJ09B0300-0300