nrf24le1-f16q48-t ETC-unknow, nrf24le1-f16q48-t Datasheet - Page 88

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nrf24le1-f16q48-t

Manufacturer Part Number
nrf24le1-f16q48-t
Description
Ultra-low Power Wireless System On-chip Solution
Manufacturer
ETC-unknow
Datasheet
nRF24LE1 Preliminary Product Specification
8.3.2
Timer 2 is controlled by T2CON while the value is in TH2 and TL2. Timer 2 also has four capture and one
compare/reload registers which can read a value without pausing or reload a new 16-bit value when Timer
2 reaches zero, see
8.3.2.1
Timer 2 can operate as a timer, event counter, or gated timer.
8.3.2.2
Timer mode is invoked by setting the t2i0=1 and t2i1=0 in the T2CON register. In this mode, the count rate
is derived from the clk input.
Revision 1.1
F
osc
T2 (count enable)
t2ex
Timer 2
Timer 2 description
Timer mode
chapter 8.4.7 on page 92
Prescaler
Figure 43. Timer 2 in Reload Mode
Figure 42. Timer 2 block diagram
CRCL + CRCH
TIMER2
and
Reload Mode 1
Reload Mode 0
88 of 191
chapter 8.4.8 on page
crch + crcl
th2 + tl2
exen2
CCL3 + CCH3
CCL2 + CCH2
CCL1 + CCH1
CCL3 + CCH3
92.
Interrupt (exf2)
Interrupt
(tf2)

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