nrf24le1-f16q48-t ETC-unknow, nrf24le1-f16q48-t Datasheet - Page 134

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nrf24le1-f16q48-t

Manufacturer Part Number
nrf24le1-f16q48-t
Description
Ultra-low Power Wireless System On-chip Solution
Manufacturer
ETC-unknow
Datasheet
P3.6 p3Di 6
P3.5 p3Di 5
P3.4 p3Di 4
P3.3 p3Di 3
P3.2 p3Di 2
P3.1 p3Di 1
P3.0 p3Di 0
P2.7 p2Di 7
P2.6 p2Di 6
P2.5 p2Di 5
P2.4 p2Di 4
P2.3 p2Di 3
P2.2 p2Di 2
P2.1 p2Di 1
P2.0 p2Di 0
P1.7 p1Di 7
P1.6 p1Di 6
P1.5 p1Di 5
P1.4 p1Di 4
P1.3 p1Di 3
P1.2 p1Di 2
P1.1 p1Di 1
P1.0 p1Di 0
P0.7 p0Di 7
P0.6 p0Di 6
P0.5 p0Di 5
P0.4 p0Di 4
P0.3 p0Di 3
P0.2 p0Di 2
P0.1 p0Di 1
P0.0 p0Di 0
Pin
a. Flash SPI interface only activated when PROG is set high, no conflict with runtime operations.
b. Connection depends on configuration register CKLFCTL 2:0
TIMER2
TIMER1
TIMER0
GPINT2
GPINT1
GPINT0
UART/
RXD
Conflict may exist depending on device configuration. In the case of a conflict, use priorities to determine IO allocation.
CKLFCTL 2:0 = 3'b000: Crystal connected between pin P0.0 and pin P0.1.
CKLFCTL 2:0 = 3'b011: Low-amplitude clock source for ckLF from pin P0.1.
CKLFCTL 2:0 = 3'b100: Digital clock source for ckLF.
Inputs
nRF24LE1 Preliminary Product Specification
connections
Revision 1.1
Default
Outputs
p3Do 6
p3Do 5
p3Do 4
p3Do 3
p3Do 2
p3Do 1
p3Do 0
p2Do 7
p2Do 6
p2Do 5
p2Do 4
p2Do 3
p2Do 2
p2Do 1
p2Do 0
p1Do 7
p1Do 6
p1Do 5
p1Do 4
p1Do 3
p1Do 2
p1Do 1
p1Do 0
UART/
TXD
p0Do 7
p0Do 6
p0Do 5
p0Do 4
p0Do 3
p0Do 2
p0Do 1
p0Do 0
priority 1
CKLF
CKLF
XOSC32K
b
c
ana AIN0
ADC/COMP SPI Master
priority 4
AIN13
AIN12
AIN11
AIN10
AIN9
AIN8
AIN7
AIN6
AIN5
AIN4
AIN3
AIN2
AIN1
ana
ana
ana
ana
ana
ana MMISO in
ana MMOSI out
ana MSCK
ana
ana
ana
ana
ana
ana
priority 2
134 of 191
Dynamically enabled connections
out
Slave/Flash
FCSN
FMISO
FMOSI
FSCK
SCSN
SMISO out
SMOSI in
SSCK
SPI
a
a
a
a
in
out
in
in
in
in
PWM0 out
PWM1 out
priority 6
PWM
priority 5
OCITO
OCITDO
OCITDI
OCITMS
OCITCK
HW Debug
out
out
in W2SDA inout
in W2SCL inout
in
priority 7
2-Wire

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