nrf24le1-f16q48-t ETC-unknow, nrf24le1-f16q48-t Datasheet - Page 56

• Manufacturer Part Number: nrf24le1-f16q48-t
• Description: Ultra-low Power Wireless System On-chip Solution
• Manufacturer: ETC-unknow

nRF24LE1 Preliminary Product Specification
4.3
4.3.1
The Arithmetic Logic Unit (ALU) provides 8-bit division, 8-bit multiplication, and 8-bit addition with or with-
out carry. The ALU also provides 8-bit subtraction with borrow and some bitwise logic operations, that is,
logical AND, OR, Exclusive OR or NOT.
All operations are unsigned integer operations. Additionally, the ALU can increment or decrement 8 bit reg-
isters. For accumulator only, it can rotate left or right through carry or not, swap nibbles, clear or comple-
ment bits and perform a decimal adjustment.
The ALU is handled by three registers, which are memory mapped as special function registers. Operands
for operations may come from accumulator ACC, register B or from outside of the unit. The result may be
stored in accumulator ACC or may be driven outside of the unit. The control register, that contains flags
such as carry, overflow or parity, is the PSW (Program Status Word) register.
The nRF24LE1 also contains an on-chip co-processor MDU (Multiplication Division Unit). This unit enables
32-bit division, 16-bit multiplication, shift and normalize operations, see
4.3.2
All instructions are binary code compatible and perform the same functions as they do within the legacy
8051 processor. The following tables give a summary of the instruction set with the required corresponding
clock cycles.
Revision 1.1
ADDC A, direct Add directly addressed data to accumulator with carry
SUBB A, direct Subtract directly addressed data from accumulator with bor-
ADDC A,#data Add immediate data to accumulator with carry
SUBB A, @Ri Subtract indirectly addressed data from accumulator with bor-
ADDC A,@Ri Add indirectly addressed data to accumulator with carry
ADD A,#data Add immediate data to accumulator
ADD A,direct Add directly addressed data to accumulator
•
•
•
ADDC A,Rn Add register to accumulator with carry
Mnemonic
ADD A,@Ri
SUBB A,Rn
ADD A,Rn
Interrupt Controller
Memory interface
Hardware support for software debug
Functional description
Arithmetic Logic Unit (ALU)
Instruction set summary
Serial 0 (80C51-like)
Synchronous mode, fixed baud rate
8-bit UART mode, variable baud rate
9-bit UART mode, fixed baud rate
9-bit UART mode, variable baud rate
Baud Rate Generator
Four Priority Levels with 13 interrupt sources
16 bit address bus
Dual Data Pointer for fast data block transfer
Add register to accumulator
Subtract register from accumulator with borrow
row
row
Add indirectly addressed data to accumulator
Description
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chapter 14 on page 119
0x28-0x2F
0x38-0x3F
0x98-0x9F
0x26-0x27
0x36-0x37
0x96-0x97
Code
0x25
0x24
0x35
0x34
0x95
Bytes Cycles
1
2
1
2
1
2
1
2
1
2
1
for details.
2
1
2
2
2
1
2
2
1
2
2