hm5216165 Elpida Memory, Inc., hm5216165 Datasheet - Page 9

• Manufacturer Part Number: hm5216165
• Description: 16 M Lvttl Interface Sdram 512-kword ? 16-bit ? 2-bank
• Manufacturer: Elpida Memory, Inc.

Self refresh entry [SELF]: When this command is input during the IDLE state, the synchronous DRAM
starts self refresh operation. After the execution of this command, self refresh continues while CKE is Low.
Since self refresh is performed internally and automatically, external refresh operations are unnecessary.
Power down mode entry: When this command is executed during the IDLE state, the synchronous DRAM
enters power down mode. In power down mode, power consumption is suppressed by cutting off the initial
input circuit.
Self refresh exit: When this command is executed during self refresh mode, the synchronous DRAM can
exit from self refresh mode. After exiting from self refresh mode, the synchronous DRAM enters the IDLE
state.
Power down exit: When this command is executed at the power down mode, the synchronous DRAM can
exit from power down mode. After exiting from power down mode, the synchronous DRAM enters the IDLE
state.
Function Truth Table
The following table shows the operations that are performed when each command is issued in each mode of
the synchronous DRAM.
Current state
Precharge
Idle
CS
H
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
RAS CAS WE
H
H
H
H
L
L
L
L
H
H
H
H
L
L
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
L
L
Data Sheet E0167H10
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
Address
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
MODE
BA, CA, A10
BA, CA, A10
BA, RA
BA, A10
MODE
Command
DESL
NOP
BST
READ/READ A
WRIT/WRIT A
ACTV
PRE, PALL
REF, SELF
MRS
DESL
NOP
BST
READ/READ A
WRIT/WRIT A
ACTV
PRE, PALL
REF, SELF
MRS
Operation
Enter IDLE after t
Enter IDLE after t
NOP
ILLEGAL
ILLEGAL
ILLEGAL
NOP
ILLEGAL
ILLEGAL
NOP
NOP
NOP
ILLEGAL
ILLEGAL
Bank and row active
NOP
Refresh
Mode register set
HM5216165 Series
RP
RP
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