hm5216165 Elpida Memory, Inc., hm5216165 Datasheet - Page 24

• Manufacturer Part Number: hm5216165
• Description: 16 M Lvttl Interface Sdram 512-kword ? 16-bit ? 2-bank
• Manufacturer: Elpida Memory, Inc.

HM5216165 Series
Command Intervals
Read command to Read command interval:
Same bank, same ROW address: When another read command is executed at the same ROW address of the
same bank as the preceding read command execution, the second read can be performed after an interval of no
less than 1 cycle. Even when the first command is a burst read that is not yet finished, the data read by the
second command will be valid.
READ to READ Command Interval (same ROW address in same bank)
Same bank, different ROW address: When the ROW address changes on same bank, consecutive read
commands cannot be executed; it is necessary to separate the two read commands with a precharge command
and a bank-active command.
Different bank: When the bank changes, the second read can be performed after an interval of no less than 1
cycle, provided that the other bank is in the bank-active state. Even when the first command is a burst read
that is not yet finished, the data read by the second command will be valid.
READ to READ Command Interval (different bank)
24
Command
Command
Address
(A0-A10)
Address
(A0-A10)
BS (A11)
BS (A11)
Dout
Dout
CLK
CLK
Bank0
Active
Bank0
ACTV
Active
ACTV
Row 0
Row
Column =A
Read
Column A
ACTV
Bank1
Active
READ
Row 1
Column =B
Column B
Column A
READ
Bank0
READ
Read
Data Sheet E0167H10
Read
Column B
READ
Bank1
Read
Column =A
Dout
out A0 out B0
Bank0
Dout
Column =B
out A0 out B0
Dout
Bank1
out B1 out B2
Dout
out B1 out B2
out B3
out B3
CAS Latency = 3
Burst Length = 4
Bank0
CAS Latency = 3
Burst Length = 4