hm5216165 Elpida Memory, Inc., hm5216165 Datasheet - Page 44

• Manufacturer Part Number: hm5216165
• Description: 16 M Lvttl Interface Sdram 512-kword ? 16-bit ? 2-bank
• Manufacturer: Elpida Memory, Inc.

HM5216165 Series
Read Cycle/Write Cycle
44
A11(BS)
DQMU
/DQML
A11(BS)
Address
Address
I/O
(output)
I/O
(output)
DQMU
/DQML
(input)
(input)
I/O
I/O
CKE
CKE
RAS
CAS
RAS
CAS
CLK
WE
WE
CS
CS
V
V
IH
IH
Bank 0
Active
Bank 0
Active
R:a
R:a
0
1
2
Bank 0
Read
Bank 0
Write
C:a
a
C:a
3
a+1 a+2 a+3
4
Bank 1
Active
Bank 1
Active
R:b
R:b
5
Data Sheet E0167H10
a
6
a+1 a+2 a+3
7
Bank 1
Read
Bank 1
Write
b
C:b
C:b
8
Bank 0
Precharge
b+1 b+2 b+3 b'
9
Bank 0
Precharge
High-Z
High-Z
10
b
11
Bank 1
Read
Bank 1
Write
b+1 b+2 b+3 b'
C:b'
C:b'
12
b'+1 b"
13
Bank 1
Read
Bank 1
Write
C:b"
C:b"
14
b"+1 b"+2 b"+3
15
b'+1 b"
16
17
Bank 1
Precharge
Bank 1
Precharge
b"+1 b"+2 b"+3
18
19
20
Read cycle
RAS-CAS delay = 3
CAS Latency = 3
Burst Length = 4
Write cycle
RAS-CAS delay = 3
CAS Latency = 3
Burst Length = 4
= V
= V
IH
IH
or V
or V
IL
IL