k4r881869m Samsung Semiconductor, Inc., k4r881869m Datasheet - Page 53

• Manufacturer Part Number: k4r881869m
• Description: 288mbit Rdram 512k X 18 Bit X 2*16 Dependent Banks Direct Rdramtm
• Manufacturer: Samsung Semiconductor, Inc.

K4R881869M
The SCK clock is also used for sampling data on RSL inputs
in one situation. Figure 48 shows the PDN and NAP exit
sequences. If the PSX field of the INIT register is one (see
Figure 27), then the PDN and NAP exit sequences are broad-
cast; i.e. all RDRAMs that are in PDN or NAP will perform
the exit sequence. If the PSX field of the INIT register is
zero, then the PDN and NAP exit sequences are directed; i.e.
DQA[5:0]
SCK
Figure 57: CMOS Timing - Device Address for NAP or PDN Exit
Page 51
only one RDRAM that is in PDN or NAP will perform the
exit sequence.
The address of that RDRAM is specified on the DQA[5:0]
bus in the set hold window t
SCK. This is shown in Figure 57. The SCK timing point is
measured at the 50% level, and the DQA[5:0] bus signals are
measured at the V
REF
level.
S3
t
S3
Preliminary
/t
Direct RDRAM
Rev. 0.9 Jan. 2000
H3
PDEV
around the rising edge of
t
H3
V
V
IH,CMOS
IL,CMOS
80%
50%
20%
V
V
80%
20%
V
REF
DIH
DIL
™