k4r881869m Samsung Semiconductor, Inc., k4r881869m Datasheet - Page 45

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k4r881869m

Manufacturer Part Number
k4r881869m
Description
288mbit Rdram 512k X 18 Bit X 2*16 Dependent Banks Direct Rdramtm
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
K4R881869M
Current and Temperature Control
Figure 51 shows an example of a transaction which performs
current control calibration. It is necessary to perform this
operation once to every RDRAM in every t
order to keep the I
This example uses four COLX packets with a CAL
command. These cause the RDRAM to drive four calibra-
tion packets Q(a0) a time t
must be placed between the Q(a0) packet and read data
Q(a1)from the same device. These calibration packets are
driven on the DQA4..3 and DQB4..3 wires. The TSQ bit of
the INIT register is driven on the DQA5 wire during same
interval as the calibration packets. The remaining DQA and
DQB wires are not used during these calibration packets.
The last COLX packet also contains a SAM command
(concatenated with the CAL command). The RDRAM
CTM/CFM
COL4
DQA8..0
CTM/CFM
COL4
DQA8..0
DQB8..0
DQB8..0
ROW2
ROW2
..COL0
..COL0
..ROW0
..ROW0
Transaction a0: CAL/SAM
Transaction a2: CAL/SAM
Transaction a1: RD
T
T
0
0
TCEN
Q (a1)
T
CAL a0
T
OL
1
1
T
T
Figure 52: Temperature Calibration (TCEN-TCAL) Transactions to RDRAM
2
2
output current in its proper range.
T
t
T
3
READTOCC
3
T
T
4
4
CAC
Read data from the same
device from an earlier RD
command must be at this
packet position or earlier.
T
CAL a0
T
5
5
T
T
Figure 51: Current Control CAL/SAM Transaction Example
t
6
6
Any ROW packet may be placed
in the gap between the ROW
packets with the TCEN and
TCAL commands.
CAC
later. An offset of t
t
T
T
TCEN
7
7
T
T
8
8
TCAL
CAL a0
T
T
9
9
T
T
10
10
a0 = {Da, Bx}
a1 = {Da, Bx}
a2 = {Da, Bx}
T
T
11
11
CCTRL
T
T
t
CAL/SAM a0
12
12
TCAL
Q (a0)
T
T
13
13
Read data from a different
device from an earlier RD
command can be anywhere
prior to the Q(a0) packet. .
T
T
14
14
T
T
interval in
RDTOCC
15
15
T
T
16
16
T
T
17
17
T
T
18
18
No read data from devices
T
T
19
19
Page 43
T
T
being calibrated
20
20
DQA5 of the first calibrate packet has the inverted TSQ bit of INIT
When used for monitoring, it should be enabled with the DQA3
Note that DQB3 could be used instead of DQA3.
T
control register; i.e. logic 0 or high voltage means hot temperature.
bit (current control one value) in case there is no RDRAM present:
T
21
21
t
samples the last calibration packet and adjusts its I
value.
Unlike REF commands, CAL and SAM commands cannot
be broadcast. This is because the calibration packets from
different devices would interfere. Therefore, a current
control transaction must be sent every t
the number of RDRAMs on the Channel. The device field
Da of the address a0 in the CAL/SAM command should be
incremented after each transaction.
Figure 52 shows an example of a temperature calibration
sequence to the RDRAM. This sequence is broadcast once
every t
The TCEN and TCAL are ROP commands, and cause the
slew rate of the output drivers to adjust for temperature drift.
During the quiet interval t
brated can’t be read, but they can be written.
T
T
TCQUIET
22
22
T
T
23
23
t
t
CCTRL
T
T
TEMP
24
24
TEMP
T
T
25
25
T
T
26
26
T
T
27
27
interval to all the RDRAMs on the Channel.
T
T
28
28
T
Read data from a different
device from a later RD
command can be anywhere
after to the Q(a0) packet.
T
HotTemp = DQA5•DQA3
29
29
T
T
30
30
T
T
31
31
T
T
32
t
32
CCSAMTOREAD
Q (a1)
T
T
33
33
TCQUIET
T
T
34
34
T
T
35
35
Preliminary
Direct RDRAM
Rev. 0.9 Jan. 2000
T
T
36
36
T
T
37
37
the devices being cali-
Read data from the same device
from a later RD command must
be at this packet position or
later.
T
T
38
38
T
T
CCTRL
39
39
T
T
40
40
T
T
41
41
T
T
/N, where N is
42
42
T
T
43
43
TCEN
T
T
CAL a2
OL
44
44
T
T
45
45
current
T
T
46
46
T
T
47
47
CAL

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