kfm2g16q2m-deb8 Samsung Semiconductor, Inc., kfm2g16q2m-deb8 Datasheet - Page 50
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kfm2g16q2m-deb8
Manufacturer Part Number
kfm2g16q2m-deb8
Description
2gb Muxonenand M-die
Manufacturer
Samsung Semiconductor, Inc.
Datasheet
1.KFM2G16Q2M-DEB8.pdf
(177 pages)
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MuxOneNAND2G(KFM2G16Q2M-DEBx)
MuxOneNAND4G(KFN4G16Q2M-DEBx)
MuxOneNAND8G(KFK8G16Q2M-DEBx)
2.7.2
The figure below shows the assignment of the spare area in the Internal Memory NAND Array.
Spare Area Assignment in the Internal Memory NAND Array Information
Note 5 : In case of ECC Bypass Mode, user can program in ECC Area.
Note 6 : For all blocks, 8th word is available to the user.
Word
1
2
3
4
5
6
7
8
LSB
However,in case of OTP Block, 8th word of sector 0, page 0 is reserved as OTP Locking Bit area.
Therefore, in case of OTP Block, user usage on this area is prohibited.
Note1 Note1 Note2 Note2 Note2 Note3 Note3 Note3
LSB
Internal Memory Spare Area Assignment
1
st
W
MSB
Byte
MSB
MSB
MSB
MSB
MSB
MSB
MSB
MSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
LSB
MSB
LSB
Main area
256W
2
nd
W
MSB
Main area
Note
256W
1
2
3
3
4
LSB
3
rd
W
MSB
Main area
256W
LSB
Invalid Block information in 1st and 2nd page of an invalid block
Managed by internal ECC logic for Logical Sector Number data
4
th
Main area
W
256W
MSB
Dedicated to internal ECC logic. Read Only. (Note 5)
Dedicated to internal ECC logic. Read Only. (Note 5)
Dedicated to internal ECC logic. Read Only. (Note 5)
Dedicated to internal ECC logic. Read Only. (Note 5)
Dedicated to internal ECC logic. Read Only. (Note 5)
50
ECCs 2nd for 3rd word of spare area data
ECCs 1st for 2nd word of spare area data
ECCm
LSB
1st
Spare
area
8W
5
th
ECCm 2nd for main area data
ECCm 3rd for main area data
ECCm 1st for main area data
Available to the user (Note 6)
W
ECCm
2nd
MSB
Reserved for future use
Reserved for future use
Spare
area
8W
Description
ECCm
LSB
3rd
Spare
area
8W
6
th
W
ECCs
MSB
1st
Spare
area
8W
FLASH MEMORY
ECCs
LSB
2nd
7
th
W
Note3
MSB
Note4 Note4
LSB
8
th
W
MSB
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