kfm2g16q2m-deb8 Samsung Semiconductor, Inc., kfm2g16q2m-deb8 Datasheet - Page 168

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kfm2g16q2m-deb8

Manufacturer Part Number
kfm2g16q2m-deb8
Description
2gb Muxonenand M-die
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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6.24
NOTE :
1. VA = Valid Address. When the Internal Routine operation is complete, the toggle bits will stop toggling.
2. Before IOBE is set to 1, RDY and INT pin are High-Z state.
6.25
MuxOneNAND2G(KFM2G16Q2M-DEBx)
MuxOneNAND4G(KFN4G16Q2M-DEBx)
MuxOneNAND8G(KFK8G16Q2M-DEBx)
A/DQ15
A/DQ0:
RDY
CLK
AVD
OE
CE
2)
Hi-Z
t
ACS
INT pin
INT bit
WE
ADQ
t
t
CES
Write command into
ACH
Command Register
Toggle Bit Timing in Synchronous Read Mode
. . .
VA
INT auto mode
See AC Characteristics Tables 5.4.
1)
t
AVDS
See AC Characteristics Tables 5.10.
t
AVDH
Note) INT pin polarity is based on ’IOBE=1 and INT pol=1 (default)’ setting
t
IAA
CMD
tWB
INT will automatically
turn to Busy State
Status Data
t
RDYS
168
INT will automatically turn back to ready state
when designated operation is completed.
VA
. . . . . . . . . .
t
FLASH MEMORY
AVDO
Status Data

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