kfm2g16q2m-deb8 Samsung Semiconductor, Inc., kfm2g16q2m-deb8 Datasheet - Page 122

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kfm2g16q2m-deb8

Manufacturer Part Number
kfm2g16q2m-deb8
Description
2gb Muxonenand M-die
Manufacturer
Samsung Semiconductor, Inc.
Datasheet

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3.13.4
MuxOneNAND2G(KFM2G16Q2M-DEBx)
MuxOneNAND4G(KFN4G16Q2M-DEBx)
MuxOneNAND8G(KFK8G16Q2M-DEBx)
The Erase Suspend/Erase Resume Commands interrupt and restart a Block Erase or Multi-Block Erase operation so that user may
perform another urgent operation on the block that is not being designated by Erase/Multi-Block Erase Operation.
Erase Suspend During a Block Erase Operation
When Erase Suspend command is written during a Block Erase or Multi-Block Erase operation, the device requires a maximum of
500us to suspend erase operation. Erase Suspend Command issue during Block Address latch sequence is prohibited.
After the erase operation has been suspended, the device is ready for the next operation including a load, program, copy-back
program, Lock, Unlock, Lock-tight, Hot Reset, NAND Flash Core Reset, Command Based Reset, Multi-Block Erase Read Verify, or
OTP Access.
The subsequent operation can be to any block that was NOT being erased.
A special case arises pertaining Erase Suspend to the OTP. A Reset command is used to exit from the OTP Access mode. If the
Reset-triggered exit from the OTP Access Mode happens during an Erase Suspend Operation, the erase routine could fail. Therefore
to exit from the OTP Access Mode without suspending the erase operation stop, a 'NAND Flash Core Reset' command should be
issued.
For the duration of the Erase Suspend period the following commands are not accepted:
Erase Suspend and Erase Resume Operation Flow Chart
Note 1) Erase Suspend command input is prohibited during Multi Block Erase address latch period.
low to high transition for 500us
Write 0 to interrupt register
• Block Erase/Multi-Block Erase/Erase Suspend
3) ’Write 0 to interrupt register’ step may be ignored when using INT auto mode. Refer to chapter 2.8.18.1
2) If OTP access mode exit happens with Reset operation during Erase Suspend mode,
Add: F241h DQ=[15]=INT
Select DataRAM for DDP
Add: F220h DQ=00B0h
Add: F241h DQ=0000h
Add: F101h DQ=DBS**
Write ’Erase Suspend
Wait for INT register
Another Operation
without the erase operation stop, Reset NAND Flash Core command should be used.
Reset operation could hurt the erase operation. So if a user wants to exit from OTP access mode
Command’
Erase Suspend / Erase Resume Operation
Start
1)
*
3)
Check Controller Status Register
Do Multi Block Erase Verify Read
Write 0 to interrupt register
in case of Multi Block Erase
Add: F241h DQ=[15]=INT
Select DataRAM for DDP
Add: F101h DQ=DBS**
Add: F241h DQ=0000h
Add: F220h DQ=0030h
Add: F100h DQ=DFS**
in case of Block Erase
low to high transition
Write ’Erase Resume
Wait for INT register
Write DFS of Flash
Command’
122
3)
* Another Operation ; Load, Program
** DBS, DFS is for DDP
Copy-back Program, OTP Access
Hot Reset, Flash Reset, CMD Reset,
Multi Block Erase Verify, Lock,
FLASH MEMORY
Lock-tight, Unlock
2)
,

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