kfm2g16q2m-deb8 Samsung Semiconductor, Inc., kfm2g16q2m-deb8 Datasheet - Page 169

• Manufacturer Part Number: kfm2g16q2m-deb8
• Description: 2gb Muxonenand M-die
• Manufacturer: Samsung Semiconductor, Inc.

MuxOneNAND2G(KFM2G16Q2M-DEBx)
MuxOneNAND4G(KFN4G16Q2M-DEBx)
MuxOneNAND8G(KFK8G16Q2M-DEBx)
7.0
From time-to-time supplemental technical information and application notes pertaining to the design and operation of the device in a
system are included in this section. Contact your Samsung Representative to determine if additional notes are available.
7.1
There are two methods of determining Interrupt Status on the MuxOneNAND. Using the INT pin or monitoring the Interrupt Status
Register Bit.
The MuxOneNAND INT pin is an output pin function used to notify the Host when a command has been completed. In ’Cache Read’,
’Synchronous Burst Block Read’ and ’2X Cache Program’ cases, INT pin notifies that only trasferring from DataRAM to page buffer is
completed. This provides a hardware method of signaling the completion of a program, erase, or load operation.
In its normal state, the INT pin is high if the INT polarity bit is default. In case of normal INT mode, before a command is written to the
command register, the INT bit must be written to '0' for the INT pin transitions to a low state indicating start of the operation. In case
of ’INT auto mode’, INT bit is written to ’0’ automatically right after command issued. Upon completion of the command operation by
the MuxOneNAND’s internal controller, INT returns to a high state.
INT pin is a DQ-type output except ’Reset’ and ’2X program’ in DDP allowing two INT outputs to be Or-tied together. In case of ’Reset’
and ’2X Program’ in DDP, INT pin operates as an open drain with 50K ohm.
abled or OE is disabled. Refer to section 2.8 for additional information about INT.
INT can be implemented by tying INT to a host GPIO or by continuous polling of the Interrupt status register.
Reset Operation (Cold,Warm,Hot and Flash Core Reset) and 2X Program
TECHNICAL AND APPLICATION NOTES
Methods of Determining Interrupt Status
General Operation
169
INT pin
INT Type (Mono)
does not float to a hi-Z condition when CE is dis-
DQ type
DQ type
FLASH MEMORY
Open drain
INT Type (DDP)
DQ type
(with 50K ohm)