stac9752xxtaeb2xr Integrated Device Technology, stac9752xxtaeb2xr Datasheet - Page 77

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stac9752xxtaeb2xr

Manufacturer Part Number
stac9752xxtaeb2xr
Description
Two-channel, 20-bit, Ac ?97 2.3 Codecs With Microphone And Jack Sensing
Manufacturer
Integrated Device Technology
Datasheet

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Part Number
Manufacturer
Quantity
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Part Number:
STAC9752XXTAEB2XR
Manufacturer:
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Quantity:
789
IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
STAC9752/9753
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
8.4.10.
8.4.11.
Bit(s) Reset Value
Bit(s) Reset Value
15:8
INT APOP
6:0
7
3
2
1
0
EAPD
D15
D15
D7
D7
Analog Current Adjust (72h)
To unlock Register 72h, write 0xABBA to Register 70h.
Default: 0000h
EAPD Access Register (74h)
Default: 0800h
0
0
0
0
0
0
0
D14
D14
D6
D6
MIC GAIN VAL
INT_APOP
SPLYOVR_EN
SPLYOVR_VA
Reserved
Reserved
RESERVED
Name
Name
L
RESERVED
RESERVED
D13
D13
D5
D5
Reserved
0 = Anti Pop Enabled
1 = Anti Pop Disabled
The STAC9752/9753 includes an internal power supply anti-pop circuit that
prevents audible clicks and pops from being heard when the CODEC is powered
on and off. This function is accomplished by delaying the charge/discharge of the
VREF capacitor (Pin 27). A C
roughly 3 seconds, which will allow the power supplies to stabilize before the
CODEC outputs are enabled. The delay will be extended to 30 seconds if a
C
same amount of time at power-off to allow the system to be gracefully turned off.
The Anti Pop bit allows this delay circuit to be bypassed for rapid production
testing. Any external component anti-pop circuit is unaffected by the internal
circuit.
Reserved
VREF
RESERVED
Adds +10dB gain to the selected MIC input. Use in conjunction with
BOOSTEN (Reg. 0Eh;D6)
BOOSTEN
Supply Override bit allows override of the supply detect.
0 = No override on supply detect
1 = Override supply detect with bit 0
Supply Override Value provides the analog voltage operation values.
0 = Force 3.3 v operation
1 = Force 5 V operation
0
0
1
1
value of 10 F is used. The CODEC outputs are also kept stable for the
D12
D12
D4
77
D4
RESERVED
MICGAINVAL
0
1
0
1
RESERVED
EAPD_OEN
D11
D11
D3
D3
VREF
Description
= 0 dB
= 10 dB
= 20 dB
= 30 dB
value of 1 F will cause a turn-on delay of
Description
INTDIS
STAC9752/9753
D10
D10
D2
D2
RESERVED
GPIOACC
D9
D1
D9
D1
GPIOSLT12
REV 3.3 1206
D8
D0
D8
D0

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