stac9752xxtaeb2xr Integrated Device Technology, stac9752xxtaeb2xr Datasheet - Page 73

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stac9752xxtaeb2xr

Manufacturer Part Number
stac9752xxtaeb2xr
Description
Two-channel, 20-bit, Ac ?97 2.3 Codecs With Microphone And Jack Sensing
Manufacturer
Integrated Device Technology
Datasheet

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Quantity
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Part Number:
STAC9752XXTAEB2XR
Manufacturer:
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Quantity:
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IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
STAC9752/9753
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
8.4.6.
Bit(s) Reset Value
3-1
4
0
Digital Audio Control (6Ah, Page 00h)
To access Register 6Ah, Page 00h must be selected in Register 24h.
D15:D5
G[4:0]
00000
00001
01111
10001
11111
D3:1
Bit
D4
D0
Reg 66h Function Code
NA
All other Function Codes
1
0
01h Headphone Out
00h Line Out
05h Mic1
06h Mic2
RESERVED Bits not used, should read back 0
Name
FIP
IV
Table 24. Register 68h/Page 01h Bit Overview
Read/Write and only reset on POR (Power on Reset) and not by RESET#.
For RESET#: Reg 68h default value is 0000h.
Information Valid Bit: Indicates whether a sensing method is provided by the
CODEC and if information field is valid. This field is updated by the CODEC.
0 - After CODEC RESET# de-assertion, it indicates the CODEC does NOT
provides sensing logic and this bit will be Read Only. After a sense cycle is
completed, indicates that no information is provided on the sensing method.
1 - After CODEC RESET# de-assertion, it indicates the CODEC provides
sensing logic for this I/O and this bit is Read/Write. After clearing this bit by
writing 1, when a sense cycle is completed the assertion of this bit indicates that
there is valid information in the remaining descriptor bits. Writing 0 to this bit has
no effect.
BIOS should NOT write this bit, as it is reset on RESET#.
Function Information Present
This bit set to a 1 indicates that the G[4:0], INV, DL[4:0] (Register 68h, Page 01h)
and ST[2:0] (register 6Ah, Page 01h) are supported and R/W capable.
This bit is Read Only.
Table 23. Gain or Attenuation Examples
Table 22. Reg 68h Default Values
Read/Write and should NOT be set by the BIOS
Gain or Attenuation (dB relative to level-out)
73
Bit R/W Overview
Read Only.
Reserved
+1.5 dBV
+24 dBV
-1.5 dBV
-24 dBV
0 dBV
Description
Reg 68h Default Value
STAC9752/9753
0010h
0010h
0010h
0010h
0000h
REV 3.3 1206

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