stac9752xxtaeb2xr Integrated Device Technology, stac9752xxtaeb2xr Datasheet - Page 32

• Manufacturer Part Number: stac9752xxtaeb2xr
• Description: Two-channel, 20-bit, Ac ?97 2.3 Codecs With Microphone And Jack Sensing
• Manufacturer: Integrated Device Technology

IDT™
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
STAC9752/9753
TWO-CHANNEL, 20-BIT, AC’97 2.3 CODECS WITH HEADPHONE DRIVE, SPDIF OUTPUT MICROPHONE & JACK SENSING
5.3.
5.2.3.
AC-Link Output Frame (SDATA_OUT)
1. Disable source of DAC samples in Controller
2. Set PR bit for DAC channel in Registers 26h, 2Ah, or 3Eh
When it wants to power up the channel, all it needs to do is:
1. Clear PR bit for DAC channel in Registers 26h, 2Ah, or 3Eh
2. Enable source of DAC samples in Controller
Primary and Secondary CODEC Register Addressing
The 2-bit CODEC ID field in the LSBs of Output Slot 0 is an addition to the original AC-Link protocol
that enables an AC‘97 Digital Controller to independently access Primary and Secondary CODEC
registers.
For Primary CODEC access, the AC‘97 Digital Controller:
1. Sets the AC-Link Frame valid bit (Slot 0, bit 15)
2. Validates the tag bits for Slot 1 and 2 Command Address and Data (Slot 0, bits 14 and 13)
3. Sets a zero value (00) into the CODEC ID field (Slot 0, bits 1 and 0)
4. Transmits the desired Primary CODEC Command Address and Command Data in Slots 1 and 2
For Secondary CODEC access, the AC‘97 Digital Controller:
1. Sets the AC-Link Frame valid bit (Slot 0, bit 15)
2. Places a non-zero value (01, 10, or 11) into the CODEC ID field (Slot 0, bits 1 and 0)
3. Transmits the desired Secondary CODEC Command Address and Command Data in Slots 1
Secondary CODECs disregard the Command Address and Command Data (Slot 0, bits 14 and 13)
tag bits. In a sense the Secondary CODEC ID field functions as an alternative Valid Command
Address (for Secondary reads and writes) and Command Data (for Secondary writes) tag indicator.
Secondary CODECs must monitor the Frame Valid bit, and ignore the frame (regardless of the state
of the Secondary CODEC ID bits) if it is not valid. AC‘97 Digital Controllers should set the frame valid
bit for a frame with a Secondary register access, even if no other bits in the output tag slot except the
Secondary CODEC ID bits are set.
The AC-Link output frame data streams correspond to the multiplexed bundles of all digital output
data targeting AC‘97’s DAC inputs and control registers. As mentioned earlier, each AC-Link output
frame supports up to 12 20-bit outgoing data time slots. Slot 0 is a special reserved time slot contain-
ing 16-bits which are used for AC-Link protocol infrastructure.
Figure 15 illustrates the time slot based AC-Link protocol.
and 2
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STAC9752/9753
REV 3.3 1206