zl50018gag2 Zarlink Semiconductor, zl50018gag2 Datasheet - Page 111

• Manufacturer Part Number: zl50018gag2
• Description: 2 K Digital Switch With Enhanced Stratum 3 Dpll
• Manufacturer: Zarlink Semiconductor

† Characteristics are over recommended operating conditions unless otherwise stated.
AC Electrical Characteristics
Note 1:
Note 2:
39 CS de-asserted time
40 WR setup to CS falling
41 RD setup to CS falling
42 Address setup to CS falling
43 Data setup to CS falling
44 WR hold after CS rising
45 RD hold after CS rising
46 Address hold after CS rising
47 Data hold after CS rising
48 Acknowledgement delay time.
49 Acknowledgement hold time.
50 RDY drive low to HiZ
CS
WR
RD
A0-A13
D0-D15
RDY
From CS low to RDY high:
From CS high to RDY low
Registers
Memory
High impedance is measured by pulling to the appropriate rail with R
A delay of 500
discharge C
after the RESET pin is set high.
Characteristics
L
.
µ
s to 2 ms (Section 17.2 on page 48) must be applied before the first microprocessor access is performed
Figure 29 - Intel Non-Multiplexed Bus Timing - Write Access
†
- Intel Non-Multiplexed Bus Mode - Write Access
t
CSD
Sym.
t
t
t
t
t
t
Zarlink Semiconductor Inc.
CSD
t
t
t
t
t
t
AKD
AKH
AKZ
WS
WH
RH
DH
RS
AS
DS
AH
t
t
t
WS
AS
RS
ZL50018
Min.
111
15
10
10
10
5
0
0
0
5
4
t
DS
Typ.
VALID ADDRESS
t
AKD
VALID WRITE DATA
L
, with timing corrected to cancel time taken to
Max.
150
55
12
8
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
t
AH
AKH
t
DH
C
C
(Note 1)
C
C
C
(Note 1)
t
t
WH
RH
L
L
L
L
L
Test Conditions
= 50 pF
= 50 pF, R
= 50 pF
= 50 pF
= 50 pF, R
t
AKZ
Data Sheet
V
V
V
V
L
L
V
V
CT
CT
CT
CT
= 1 K
= 1 K
CT
CT
2